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參數(shù)資料
| 型號： | MSM6542-3GS-VK |
| 廠商： | LAPIS SEMICONDUCTOR CO LTD |
| 元件分類： | 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取 |
| 英文描述： | 1 TIMER(S), REAL TIME CLOCK, PDSO24 |
| 封裝： | 0.430 INCH, PLASTIC, SOP-24 |
| 文件頁數(shù)： | 29/55頁 |
| 文件大小： | 361K |
| 代理商： | MSM6542-3GS-VK |
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Semiconductor
MSM6542-01/02/03
101
Frequency
counter
Eye
Frequency adjustment
CD ← (0, 0, 1, 0)
Read CE register
*3
IRQ FLAG = 1 ?
1
A carry (oscillation) is checked
Output of a signal at the frequency set by CD'
is command through pin 1.
N
Y
*1 To cancel data protection, oscillation must be in progress. It takes about 13 ms (2 ms
during which the writing of DP
0 is inhibit in the rising of CS
1 plus 11 ms required until
DP = 0 is executed.) This loop includes a wait time before oscillation starts. Usually, the
loop takes 0.5 to 2 seconds. When the power is turned on, the value of the DP bit is
unpredictable. When the value is 0 incidentally, the loop does not return.
*2, 3
The IRQ FLAG
1 is cleared at the step marked *2. If IRQ FLAG1 = 1 is detected in the loop
marked *3, therefore, it means that original oscillation is divided.
Other notes
Possible causes why the loop marked *1 or *3 becomes endless
Yes
→ Incorrect programming
The frequency counter is not adjusted.
Observe the waveform at pin 1 on an
oscilloscope.
Oscillation waveform at XT
No
→ Oscillation is impeded by a leak due to
a dirty PC board. Clean the PC board.
The capacitance of the capacitor for
oscillation is inadequate. Consult the
crystal manufacturer.
Defective crystal oscillator or IC. Re-
place it.
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