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參數(shù)資料
| 型號(hào)： | MSM65X227TS-K |
| 廠商： | OKI ELECTRIC INDUSTRY CO LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, EEPROM, 6 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, TQFP-100 |
| 文件頁數(shù)： | 13/18頁 |
| 文件大?。?/td> | 142K |
| 代理商： | MSM65X227TS-K |
4/18
MSM65X227
Semiconductor
PIN DESCRIPTION
Basic Functions
Function
Symbol
Type
Description
Power Supply
VDD
Digital power supply (5V)
GND
Digital ground
RESET
I
Oscillation
RD
O
ALE
O
Control
—
System reset input:
When this pin goes into the "L" state, the internal state is
initialized and the execution of an instruction starts from address
0040H. The input is pulled up to VDD with an internal pull-up
resistor.
Read signal at external memory access:
Read cycle in memory is indicated when the signal goes into the
"L" level during external memory access.
Address latch signal at external memory access:
The MSM65X227 uses a time dividing address/data bus. This
signal uses the lower 8 bits of the address as a strobe signal to
latch the external latch circuit.
EXWR
I
External write enable pin :
Sampled at a system reset and enables external EEPROM write
and read during the "L" level.
AVDD
Analog power supply (5V)
—
AGND
Analog ground
—
VRH
Analog reference voltage (5V)
—
VRL
Analog reference voltage (ground)
—
OSC0
CPU oscillation input pin
I
OSC1
CPU oscillation output pin
O
XT
CPU start-up timer oscillation input pin
I
XT
CPU start-up timer oscillation output pin
O
WR
O
Write-signal during external memory access:
Write cycle in memory is indicated when the signal goes into the
"L" level during external memory access.
AD0 - AD7
I/O
8-bit address/data bus:
Address/data bus performs lower 8-bit address output,
instruction fetch or data read/write along with the ALE, RD and
WR pins.
A8 - A16
O
9-bit address bus:
Address bus for the upper 9 bits.
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