
8/15
MSM7540L/7560L
Semiconductor
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Analog Input Voltage
Digital Input Voltage
Storage Temperature
Symbol
V
DD
V
AIN
V
DIN
T
STG
Condition
—
—
—
—
Rating
–0.3 to +5
–0.3 to V
DD
+ 0.3
–0.3 to V
DD
+ 0.3
–55 to +150
Unit
V
V
V
°C
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
V
DD
Ta
Condition
Min.
2.7
–25
Typ.
—
+25
Max.
3.6
+75
Unit
V
°C
Power Supply Voltage
Operating Temperature
Voltage must be fixed
MCK, XSYNC, RSYNC, PCMRI,
PCMSI, BCLKA, BCLKB, IR,
LPS, PDN, RES
MCK, XSYNC, RSYNC, PCMRI,
PCMSI, BCLKA, BCLKB, IR,
LPS, PDN, RES
MCK
BCLKA
BCLKB
XSYNC, RSYNC
MCK, BCLKA, BCLKB
MCK, XSYNC, RSYNC, PCMRI,
PCMSI, BCLKA, BCLKB, IR,
LPS, PDN, RES
MCK, XSYNC, RSYNC, PCMRI,
PCMSI, BCLKA, BCLKB, IR,
LPS, PDN, RES
BCLKA, BCLKB to XSYNC
XSYNC to BCLKA, BCLKB
BCLKA, BCLKB to RSYNC
RSYNC to BCLKA, BCLKB
XSYNC, RSYNC
—
—
IS (Pull-up Resistor)
IS, PCMSO, PCMRO
SG
′
GND
Input High Voltage
V
IH
0.45
¥
V
DD
—
V
DD
V
Input Low Voltage
V
IL
0
—
0.16
¥
V
DD
V
Master Clock Frequency
f
MCK
f
BCKA
f
BCKB
f
SYMC
D
C
–
0.01%
32
64
—
30
10.368
—
—
8.0
50
+
0.01%
2048
2048
—
70
MHz
kHz
kHz
kHz
%
Bit Clock Freqency
Synchronous Signal Frequency
Clock Duty Ratio
Digital Input Rise Time
t
Ir
—
—
50
ns
Digital Input Fall Time
t
If
—
—
50
ns
Transmit Sync Signal Setting Time
t
XS
t
XS
t
RS
t
SR
t
WS
t
DS
t
DH
R
DL
C
DL
C
SG
100
100
100
100
1 BCLK
100
100
500
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
100
—
—
—
100
—
ns
ns
ns
ns
m
s
ns
ns
W
pF
m
F
Receive Sync Signal Setting Time
Synchronous Signal Width
PCM, ADPCM Set-up Time
PCM, ADPCM Hold Time
Digital Output Load
—
Bypass Capacitor for SG
10+0.1