- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378017 > MSM7584C (OKI SEMICONDUCTOR CO., LTD.) π/4 Shift QPSK MODEM(π/4移動QPSK調(diào)制解調(diào)器/ADPCM編碼譯碼器) PDF資料下載
參數(shù)資料
| 型號： | MSM7584C |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | π/4 Shift QPSK MODEM(π/4移動QPSK調(diào)制解調(diào)器/ADPCM編碼譯碼器) |
| 中文描述： | π/ 4移位的QPSK調(diào)制解調(diào)器（π/ 4移動的QPSK調(diào)制解調(diào)器/差分PcM編碼譯碼器） |
| 文件頁數(shù)： | 15/57頁 |
| 文件大?。?/td> | 321K |
| 代理商： | MSM7584C |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁
Semiconductor
MSM7584C
15/57
VDDM
+3 V power supply for the modem unit.
Connect this pin to the ADPCM CODEC power supply VDDC on the board.
AGM
Modem analog signal ground.
DGM
Modem digital signal ground.
Since this pin is internaly separated from AGM, AGC, and DGC, this pin must be connected to
theses pins on the board.
MCK
Master clock input. The clock frequency is 19.2 MHz.
The master clock must always be input to the ADPCM CODEC and MODEM except the device
being in power down mode because the both units share the master clock.
If the input level is less than 2 V, the master clock must be input after DC-component is cut by
an approx. 1000 pF capacitor. (See the application circuit example.)
IFIN
Modulated signal input for the demodulator unit.
The CR14 - B4 can select an IF frequency of 1.2 MHz or 10.8 MHz.
RXD, RXC, RXSC
Receive data, receive clock (384 kHz), receive symbol clock (192 kHz) outputs.
When the power is turned on, outputs in which a clock regeneration circuit selected by SLS
appear on these output pin.
Figure 4 Timing Diagram of RXD, RXC, and RXSC
SLS
Receive side operation slot selection signal.
This device has two clock regeneration circuits and two AFC data memory registers. If SLS is at
"0" level, slot 1 is selected; if SLS is at "1" level, slot 2 is selected.
RPR
High-speed phase clock control signal input for the clock regeneration circuit.
If this pin is at "1" level, the clock regeneration circuit enters the high-speed phase clock mode.
When the phase difference is less than a defined value, the circuit shifts to the low-speed phase
clock mode automatically. If this pin is at "0" level, the circuit is always in the low-speed phase
clock mode.
RXD
RXC
RXSC
SLS
1 Symbol
The regenerated data and clock are
selected asynchronously by the SLS signal.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MSM7590L-01 | Multi-Function ADPCM CODEC |
| MSM7590 | 5V Sinlge-Rail ADPCM CODECs |
| MSM7602 | Echo Canceler |
| MSM7602-001 | Echo Canceler |
| MSM7602-011 | Echo Canceler |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MSM7584CTS-K | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:pi /4 Shift QPSK MODEM/ADPCM CODEC |
| MSM7584D | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:pi/4 Shift QPSK MODEM/ADPCM CODEC |
| MSM7584DTS-K | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:pi/4 Shift QPSK MODEM/ADPCM CODEC |
| MSM7586-01 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:pie/4 Shift QPSK MODEM/ADPCM CODEC |
| MSM7586-03 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:pie/4 Shift QPSK MODEM/ADPCM CODEC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。
