參數(shù)資料
型號: MSM80C85AHRS
廠商: LAPIS SEMICONDUCTOR CO LTD
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 5 MHz, MICROPROCESSOR, PDIP40
封裝: 0.600 INCH, 2.54 MM PITCH, PLASTIC, DIP-40
文件頁數(shù): 14/32頁
文件大小: 355K
代理商: MSM80C85AHRS
20
Semiconductor
MSM80C85AHRS/GS/JS
RETURN
RET
RC
RNC
RZ
RNZ
RP
RM
RPE
RPO
Mnemonic
Description
Instruction Code (1)
Clock (2)
Cycles
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
D7 D6 D5 D4 D3 D2 D1 D0
10
6/12
Return
Return on carry
Return on no carry
Return on zero
Return on no zero
Return on positive
Return on minus
Return on parity even
Return on parity odd
RESTART
RST
11
A
111
12
Restart
INPUT/OUTPUT
IN
OUT
1
0
1
0
1
10
Input
Output
INCREMENT AND DECREMENT
INR r
DCR r
INR M
DCR M
INX B
INX D
INX H
INX SP
DCX B
DCX D
DCX H
DCX SP
0
D
1
0
1
0
1
D
1
0
1
0
1
0
1
0
1
D
0
1
0
1
0
1
0
1
4
10
6
Increment register
Decrement register
Increment memory
Decrement memory
Increment B & C registers
Increment D & E registers
Increment H & L registers
Increment stack pointer
Decrement B & C
Decrement D & E
Decrement H & L
Decrement stack pointer
ADD
ADD r
ADC r
ADD M
ADC M
ADI
ACI
DAD B
DAD D
DAD H
DAD SP
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
S
1
0
S
1
0
S
0
1
4
7
10
Add register to A
Add register to A with carry
Add memory to A
Add memory to A with carry
Add immediate to A
Add immediate to A with carry
Add B & C to H & L
Add D & E to H & L
Add H & L to H & L
Add stack pointer to H & L
SUBTRACT
SUB r
SBB r
SUB M
SBB M
SUI
SBI
1
0
1
0
1
0
1
0
1
0
1
S
1
S
1
S
0
4
7
Subtract register from A
Subtract register from A with borrow
Subtract memory from A
Subtract memory from A with borrow
Subtract immediate from A
Subtract immediate from A with borrow
Table 8 Instruction Set Summary cont'd
相關(guān)PDF資料
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