參數(shù)資料
型號(hào)： MSM82C55A-2GS-2K
廠商： LAPIS SEMICONDUCTOR CO LTD
元件分類： 微控制器/微處理器
英文描述： 24 I/O, PIA-GENERAL PURPOSE, PQFP44
封裝： 0.80 MM PITCH, PLASTIC, QFP-44
文件頁(yè)數(shù)： 5/27頁(yè)
文件大?。?/td> 207K
代理商： MSM82C55A-2GS-2K
12/26
Semiconductor
MSM82C55A-2RS/GS/VJS
Precaution for Mode Selection
The output registers for ports A and C are cleared to f each time data is written in the command
register and the mode is changed, but the port B state is undefined.
Bit Set/Reset Function
When port C is defined as output port, it is possible to set (set output to 1) or reset (set output
to 0) any one of 8 bits without affecting other bits as shown below.
D0
Definition of set/reset
for a desired bit.
0 = Reset
1 = Set
D1
D2
D3
D4
D5
D6
D7
Control word Identification flag
When set to 1, it becomes the control
word to define a mode and input/output.
Definition of bit wanted
to be set or reset.
Dont's Care
D3 D2
Port C
0
PC0
0
PC1
0
1
PC2
D1
0
1
0
1
PC3
1
0
PC4
1
0
PC5
1
0
1
PC6
1
PC7
0
1
Be sure to set to 0 for bit set/reset
Interrupt Control Function
When the MSM82C55A-2 is used in mode 1 or mode 2, the interrupt signal for the CPU is
provided. The interrupt request signal is output from port C. When the internal flip-flop INTE
is set beforehand at this time, the desired interrupt request signal is output. When it is reset
beforehand, however, the interrupt request signal is not output. The set/reset of the internal
flip-flop is made by the bit set/reset operation for port C virtually.
Bit set INTE is set Interrupt allowed
Bit reset INTE is reset Interrupt inhibited
Operational Description by Mode
1. Mode 0 (Basic input/output operation)
Mode 0 makes the MSM82C55A-2 operate as a basic input port or output port. No control
signals such as interrupt request, etc. are required in this mode. All 24 bits can be used as
two-8-bit ports and two 4-bit ports. Sixteen combinations are then possible for inputs/
outputs. The inputs are not latched, but the outputs are.
相關(guān)PDF資料
PDF描述
MSM82C55A-2RS 24 I/O, PIA-GENERAL PURPOSE, PDIP40
MSM82C55A-2VJS 24 I/O, PIA-GENERAL PURPOSE, PQCC44
MSM82C59A-2GS-K 80C85AH; 80C86A; 80C88A COMPATIBLE, INTERRUPT CONTROLLER, PDSO32
MSM82C84A-2GS-K 8 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO24
MSM82C84A-2JS OTHER CLOCK GENERATOR, PQCC20
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MSM82C55A-2R3 制造商:OKI Semiconductor 功能描述:CPU I/O EOL211209 制造商:ROHM Semiconductor 功能描述:
MSM82C55A-2RS 制造商:ROHM Semiconductor 功能描述: 制造商:OKI Semiconductor 功能描述:PERIPHERAL INTERFACE, 40 Pin, Plastic, DIP 制造商:ROHM Semiconductor 功能描述:CMOS PROGRAMMABLE PERIPHERAL INTERFACE
MSM82C55A-2VJ3 制造商:OKI Semiconductor 功能描述:CPU I/OS EOL211209 制造商:ROHM Semiconductor 功能描述:
MSM82C55A-2VJS 制造商:ROHM Semiconductor 功能描述: 制造商:OK International 功能描述:PERIPHERAL INTERFACE, 44 Pin, Plastic, PLCC 制造商:OKI Semiconductor 功能描述:PERIPHERAL INTERFACE, 44 Pin, Plastic, PLCC
MSM82C55A-2VJSDR1 制造商:ROHM Semiconductor 功能描述:
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