參數(shù)資料
型號: MSP430CG4616IZQW
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PBGA113
封裝: PLASTIC, BGA-113
文件頁數(shù): 54/110頁
文件大小: 1605K
代理商: MSP430CG4616IZQW
MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
SLAS508I APRIL 2006 REVISED MARCH 2011
48
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
USCI (I2C mode) (see Figure 22)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
fUSCI
USCI input clock frequency
Internal: SMCLK, ACLK
External: UCLK
Duty Cycle = 50%
± 10%
fSYSTEM
MHz
fSCL
SCL clock frequency
2.2 V/3 V
0
400
kHz
t
Hold time (repeated) START
fSCL ≤ 100kHz
2.2 V/3 V
4.0
s
tHD,STA
Hold time (repeated) START
fSCL > 100kHz
2.2 V/3 V
0.6
μs
t
Set up time for a repeated START
fSCL ≤ 100kHz
2.2 V/3 V
4.7
s
tSU,STA
Setup time for a repeated START
fSCL > 100kHz
2.2 V/3 V
0.6
μs
tHD,DAT
Data hold time
2.2 V/3 V
0
ns
tSU,DAT
Data setup time
2.2 V/3 V
250
ns
tSU,STO
Setup time for STOP
2.2 V/3 V
4.0
μs
t
Pulse width of spikes suppressed by
2.2 V
50
150
600
ns
tSP
Pulse width of spikes suppressed by
input filter
3 V
50
100
600
ns
SDA
SCL
t
LOW
tHD ,DAT
tSU ,DAT
tHD ,STA
tSU ,STA tHD ,STA
tHIGH
tSU ,STO
tSP
tBUF
Figure 22. I2C Mode Timing
USART1 (see Note 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t
USART1 deglitch time
VCC = 2.2 V, SYNC = 0, UART mode
200
430
800
ns
t(τ)
USART1 deglitch time
VCC = 3 V, SYNC = 0, UART mode
150
280
500
ns
NOTE 1: The signal applied to the USART1 receive signal/terminal (URXD1) should meet the timing requirements of t(τ) to ensure that the URXS
flip-flop is set. The URXS flip-flop is set with negative pulses meeting the minimum-timing condition of t(τ). The operating conditions to
set the flag must be met independently from this timing constraint. The deglitch circuitry is active only on negative transitions on the
URXD1 line.
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