參數(shù)資料
型號： MSP430CG4616IZQW
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PBGA113
封裝： PLASTIC, BGA-113
文件頁數(shù)： 71/110頁
文件大?。?/td> 1605K
代理商： MSP430CG4616IZQW
MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
SLAS508I APRIL 2006 REVISED MARCH 2011
63
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted)
flash memory (MSP430FG461x devices only)
PARAMETER
TEST
CONDITIONS
VCC
MIN
TYP
MAX
UNIT
VCC(PGM/
ERASE)
Program and Erase supply voltage
2.7
3.6
V
fFTG
Flash Timing Generator frequency
257
476
kHz
IPGM
Supply current from DVCC during program
2.7 V/ 3.6 V
3
5
mA
IERASE
Supply current from DVCC during erase
See Note 3
2.7 V/ 3.6 V
3
7
mA
IGMERASE
Supply current from DVCC during global
mass erase
See Note 4
2.7 V/ 3.6 V
6
14
mA
tCPT
Cumulative program time
See Note 1
2.7 V/ 3.6 V
10
ms
tCMErase
Cumulative mass erase time
2.7 V/ 3.6 V
20
ms
Program/Erase endurance
104
105
cycles
tRetention
Data retention duration
TJ = 25°C
100
years
tWord
Word or byte program time
30
tBlock, 0
Block program time for 1st byte or word
25
tBlock, 1-63
Block program time for each additional byte
or word
SN t 2
18
t
tBlock, End
Block program end-sequence wait time
See Note 2
6
tFTG
tMass Erase
Mass erase time
10593
tGlobal Mass Erase
Global mass erase time
10593
tSeg Erase
Segment erase time
4819
NOTES:
1. The cumulative program time must not be exceeded during a block-write operation. This parameter is only relevant if the block write
feature is used.
2. These values are hardwired into the Flash Controller’s state machine (tFTG = 1/fFTG).
3. Lower 64-KB or upper 64-KB Flash memory erased.
4. All Flash memory erased.
JTAG interface
PARAMETER
TEST
CONDITIONS
VCC
MIN
TYP
MAX
UNIT
f
TCK input frequency
See Note 1
2.2 V
0
5
MHz
fTCK
TCK input frequency
See Note 1
3 V
0
10
MHz
RInternal
Internal pull-up resistance on TMS, TCK, TDI/TCLK
See Note 2
2.2 V/ 3 V
25
60
90
k
Ω
NOTES:
1. fTCK may be restricted to meet the timing requirements of the module selected.
2. TMS, TDI/TCLK, and TCK pull-up resistors are implemented in all versions.
JTAG fuse (see Note 1)
PARAMETER
TEST
CONDITIONS
VCC
MIN
TYP
MAX
UNIT
VCC(FB)
Supply voltage during fuse-blow condition
TA = 25°C
2.5
V
VFB
Voltage level on TDI/TCLK for fuse-blow: F versions
6
7
V
IFB
Supply current into TDI/TCLK during fuse blow
100
mA
tFB
Time to blow fuse
1
ms
NOTE 1: Once the fuse is blown, no further access to the MSP430 JTAG/Test and emulation features is possible. The JTAG block is switched
to bypass mode.
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