參數(shù)資料
型號(hào): MSP430F2132TPWR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PDSO28
封裝: GREEN, PLASTIC, TSSOP-28
文件頁數(shù): 18/81頁
文件大小: 1738K
代理商: MSP430F2132TPWR
MSP430F21x2
MIXED SIGNAL MICROCONTROLLER
SLAS578G -- NOVEMBER 2007 -- REVISED DECEMBER 2009
25
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
outputs -- Ports P1, P2 and P3
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
I(OHmax) = --1.5 mA (see Notes 1)
2.2 V
VCC--0.25
VCC
V
High-level output
I(OHmax) =--6 mA (see Notes 2)
2.2 V
VCC--0.6
VCC
V
VOH
High level output
voltage
I(OHmax) = --1.5 mA (see Notes 1)
3V
VCC--0.25
VCC
V
I(OHmax) =--6 mA (see Notes 2)
3V
VCC--0.6
VCC
I(OLmax) = 1.5 mA (see Notes 1)
2.2 V
VSS
VSS+0.25
V
Low-level output
I(OLmax) =6mA(see Notes2)
2.2 V
VSS
VSS+0.6
V
VOL
Low level output
voltage
I(OLmax) = 1.5 mA (see Notes 1)
3V
VSS
VSS+0.25
V
I(OLmax) =6mA(see Notes2)
3V
VSS
VSS+0.6
NOTES: 1. The maximum total current, IOHmax and IOLmax, for all outputs combined, should not exceed ±12 mA to hold the maximum
voltage drop specified.
2. The maximum total current, IOHmax and IOLmax, for all outputs combined, should not exceed ±48 mA to hold the maximum
voltage drop specified.
output frequency -- Ports P1, P2 and P3
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
f
Port output frequency
P1.4/SMCLK, CL =20 pF, RL =1k
2.2 V
7.5
MHz
fPx.y
Port output frequency
(with load)
P1.4/SMCLK, CL = 20 pF, RL = 1 k
(see Note 1 and 2)
3V
12
MHz
f
Clock output frequency
P2.0/ACLK, P1.4/SMCLK, CL =20 pF
2.2 V
7.5
MHz
fPort_CLK
Clock output frequency
P2.0/ACLK, P1.4/SMCLK, CL = 20 pF
(see Note 2)
3V
16
MHz
NOTES: 1. A resistive divider with 2 × 0.5 k between VCC and VSS is used as load. The output is connected to the center tap of the divider.
2. The output voltage reaches at least 10% and 90% VCC at the specified toggle frequency.
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