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參數資料
| 型號： | MSP430F2274TRHAT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQCC40 |
| 封裝： | GREEN, PLASTIC, QFN-40 |
| 文件頁數： | 49/94頁 |
| 文件大?。?/td> | 1583K |
| 代理商： | MSP430F2274TRHAT |
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MSP430F22x2
MSP430F22x4
SLAS504E
– JULY 2006 – REVISED MARCH 2011
Operational Amplifier (OA) Supply Specifications (MSP430F22x4 Only)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
VCC
Supply voltage range
2.2
3.6
V
Fast Mode
180
290
ICC
Supply current(1)
Medium Mode
2.2 V/3 V
110
190
A
Slow Mode
50
80
PSRR
Power-supply rejection ratio
Noninverting
2.2 V/3 V
70
dB
(1)
Corresponding pins configured as OA inputs and outputs, respectively.
Operational Amplifier (OA) Input/Output Specifications (MSP430F22x4 Only)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
VI/P
Input voltage range
-0.1
VCC - 1.2
V
TA = -40 to +55°C
-5
±0.5
5
Input leakage
Ilkg
TA = +55 to +85°C
2.2 V/3 V
-20
±5
20
nA
current(1) (2)
TA = +85 to +105°C
-50
50
Fast Mode
50
Medium Mode
fV(I/P) = 1 kHz
80
Slow Mode
140
Voltage noise
Vn
nV/
√Hz
density, I/P
Fast Mode
30
Medium Mode
fV(I/P) = 10 kHz
50
Slow Mode
65
VIO
Offset voltage, I/P
2.2 V/3 V
±10
mV
Offset temperature
2.2 V/3 V
±10
V/°C
drift, I/P(3)
Offset voltage drift
0.3 V
≤ VIN ≤ VCC - 1.0 V
2.2 V/3 V
±1.5
mV/V
with supply, I/P
ΔVCC ≤ ±10%, TA = 25°C
Fast Mode, ISOURCE ≤ -500 A
VCC - 0.2
VCC
High-level output
VOH
2.2 V/3 V
V
voltage, O/P
Slow Mode, ISOURCE ≤ -150 A
VCC - 0.1
VCC
Fast Mode, ISOURCE ≤ 500 A
VSS
0.2
Low-level output
VOL
2.2 V/3 V
V
voltage, O/P
Slow Mode, ISOURCE ≤ 150 A
VSS
0.1
RLoad = 3 k, CLoad = 50 pF,
150
250
VO/P(OAx) < 0.2 V
Output resistance(4)
RLoad = 3 k, CLoad = 50 pF,
RO/P(OAx)
2.2 V/3 V
150
250
(see Figure 25)
VO/P(OAx) > VCC - 1.2 V
RLoad = 3 k, CLoad = 50 pF,
0.1
4
0.2 V
≤ VO/P(OAx) ≤ VCC - 0.2 V
Common-mode
CMRR
Noninverting
2.2 V/3 V
70
dB
rejection ratio
(1)
ESD damage can degrade input current leakage.
(2)
The input bias current is overridden by the input leakage current.
(3)
Calculated using the box method
(4)
Specification valid for voltage-follower OAx configuration
Copyright
2006–2011, Texas Instruments Incorporated
53
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相關代理商/技術參數 |
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