參數(shù)資料
型號: MSP430F5132IDA
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, RISC MICROCONTROLLER, PDSO38
封裝: GREEN, PLASTIC, TSSOP-38
文件頁數(shù): 51/102頁
文件大小: 1183K
代理商: MSP430F5132IDA
MSP430F51x1
MSP430F51x2
SLAS619A
– AUGUST 2010 – REVISED AUGUST 2011
Wake-Up From Low-Power Modes
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
fMCLK ≥ 4 MHz
3
6.5
Wake-up time from LPM2,
PMMCOREVx = 0 = SVSMLRRLx = n
tFAST-WAKE-UP
s
1 MHz
< fMCLK <
LPM3, or LPM4 to active mode
(where n = 0, 1, 2, or 3), SVSLFP = 1
4
8.0
4 MHz
Wake-up time from LPM2,
PMMCOREVx = 0 = SVSMLRRLx = n
tSLOW-WAKE-UP
150
165
s
LPM3, or LPM4 to active mode
(where n = 0, 1, 2, or 3), SVSLFP = 0
Wake-up time from LPM4.5 to
tWAKE-UP LPM5
2
3
ms
active mode
Wake-up time from RST or
tWAKE-UP-RESET
2
3
ms
BOR event to active mode
Timer_A
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Internal: SMCLK, ACLK
fTA
Timer_A input clock frequency
External: TACLK
1.8 V/ 3 V
25
MHz
Duty cycle = 50%
± 10%
All capture inputs.
tTA,cap
Timer_A capture timing
Minimum pulse width required for
1.8 V/ 3 V
20
ns
capture.
USCI (UART Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Internal: SMCLK, ACLK
fUSCI
USCI input clock frequency
External: UCLK
fSYSTEM
MHz
Duty cycle = 50%
± 10%
Maximum BITCLK clock frequency
fmax,BITCLK
1
MHz
(equals baud rate in MBaud)(1)
2.2 V
50
150
200
tτ
UART receive deglitch time
ns
3 V
50
150
200
(1)
The DCO wake-up time must be considered in LPM3/4. The wake-up time must be considered in LPMx.5.
52
Copyright
2010–2011, Texas Instruments Incorporated
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