參數(shù)資料
型號(hào)： MSP430F5132IDA
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, RISC MICROCONTROLLER, PDSO38
封裝： GREEN, PLASTIC, TSSOP-38
文件頁(yè)數(shù)： 65/102頁(yè)
文件大?。?/td> 1183K
代理商： MSP430F5132IDA
MSP430F51x1
MSP430F51x2
SLAS619A
– AUGUST 2010 – REVISED AUGUST 2011
Timer_D, Local Clock Generator Frequency (continued)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TDHREGEN = 0, TDHMx = 0, TDHCLKCR = 1,
TDHCLKRx = 2, TDHCLKSRx = 31,
119
170
221
MHz
TDHCLKTRIM = 0
fHRCG(2,31,0)
HRCG frequency (2, 31, 0)
TDHREGEN = 0, TDHMx = 1, TDHCLKCR = 1,
TDHCLKRx = 2, TDHCLKSRx = 31,
238
340
442
MHz
TDHCLKTRIM = 0
TDHREGEN = 0, TDHMx = 0, TDHCLKCR = 1,
TDHCLKRx = 2, DHCLKSRx = 31,
212
303
394
MHz
TDHCLKTRIM = 64
fHRCG(2,31,64)
HRCG frequency (2, 31, 64)
TDHREGEN = 0, TDHMx = 1, TDHCLKCR = 1,
TDHCLKRx = 2, DHCLKSRx = 31,
424
606
788
MHz
TDHCLKTRIM = 64
TDHREGEN = 0, TDHMx = 0, TDHCLKCR = 1,
TDHCLKRx =2, TDHCLKSRx = 31,
290
413
537
MHz
TDHCLKTRIM = 128
fHRCG(2,31,128)
HRCG frequency (2, 31, 128)
TDHREGEN = 0, TDHMx = 1, TDHCLKCR = 1,
TDHCLKRx = 2, TDHCLKSRx = 31,
580
826
1074
MHz
TDHCLKTRIM = 128
SHRCG,0,SR
TDHCLKSRx step size in Range 0
SHRCGSR = fHRCGSR(HRCGSR+1) - fHRCG(HRCGSR)
120
185
225
kHz
SHRCG,1,SR
TDHCLKSRx step size in Range 1
SHRCGSR = fHRCGSR(HRCGSR+1) - fHRCG(HRCGSR)
220
325
395
kHz
SHRCG,2,SR
TDHCLKSRx step size in Range 2
SHRCGSR = fHRCGSR(HRCGSR+1) - fHRCG(HRCGSR)
400
555
700
kHz
0
> = TDHCLKTRIMx < 16,
55
85
120
kHz
step size in range 0
15
< TDHCLKTRIMx < 49,
SHRCGSR = fHRCGSR(HRCGTRIM+1) -
SHRCG,0,TRIM
40
85
130
kHz
step size in range 1
fHRCG(HRCGTRIM), TDHCLKSRx = X, Y, Z
48
< TDHCLKTRIMx < 64,
40
85
120
kHz
step size in range 2
0
> = TDHCLKTRIMx < 16,
90
160
230
kHz
step size in range 0
15
< TDHCLKTRIMx < 49,
SHRCGSR = fHRCGSR(HRCGTRIM+1) -
SHRCG,1,TRIM
80
160
230
kHz
step size in range 1
fHRCG(HRCGTRIM), TDHCLKSRx = X, Y, Z
48
< TDHCLKTRIMx < 64,
80
160
230
kHz
step size in range 2
0
> = TDHCLKTRIMx < 16,
150
230
360
kHz
step size in range 0
15
< TDHCLKTRIMx < 49,
SHRCGSR = fHRCGSR(HRCGTRIM+1) -
SHRCG,2,TRIM
130
230
350
kHz
step size in range 1
fHRCG(HRCGTRIM), TDHCLKSRx = X, Y, Z
48
< TDHCLKTRIMx < 32,
100
230
340
kHz
step size in range 2
fHRCG = 8 MHz, TDHREGEN = 0
±0.17
%/
°C
fHRCG = 16 MHz, TDHREGEN = 0
±0.16
%/
°C
dfHRCG/dT
HRCG frequency temperature drift
fHRCG = 25 MHz, TDHREGEN = 0
±0.16
%/
°C
fHRCG = 8/16/25MHz, TDHREGEN = 1
0
%/
°C
fHRCG = 8/16/25 MHz, TDHREGEN = 0
0
5
%/V
dfHRCG/dVCORE
HRCG frequency voltage drift
fHRCG = 8/16/25 MHz, TDHREGEN = 1
0
%/V
Settling time
TDHEN = 0 -
> 1, TDHFW = 0
3
5
9
s
tSETTLE
Settling time, fast wake-up
TDHEN = 0 -
> 1, TDHFW = 1
1.5
s
Copyright
2010–2011, Texas Instruments Incorporated
65
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