參數(shù)資料
型號(hào)： MSP430F5437IPNR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PQFP80
封裝： GREEN, PLASTIC, LQFP-80
文件頁(yè)數(shù)： 11/99頁(yè)
文件大小： 985K
代理商： MSP430F5437IPNR
MSP430F543x, MSP430F541x
www.ti.com
SLAS612C – AUGUST 2009 – REVISED MARCH 2010
System Module (SYS)
The SYS module handles many of the system functions within the device. These include power on reset and
power up clear handling, NMI source selection and management, reset interrupt vector generators, boot strap
loader entry mechanisms, as well as, configuration management (device descriptors). It also includes a data
exchange mechanism via JTAG called a JTAG mailbox that can be used in the application.
Table 6. System Module Interrupt Vector Registers
INTERRUPT VECTOR REGISTER
ADDRESS
INTERRUPT EVENT
VALUE
PRIORITY
SYSRSTIV , System Reset
019Eh
No interrupt pending
00h
Brownout (BOR)
02h
Highest
RST/NMI (POR)
04h
PMMSWBOR (BOR)
06h
Reserved
08h
Security violation (BOR)
0Ah
SVSL (POR)
0Ch
SVSH (POR)
0Eh
SVML_OVP (POR)
10h
SVMH_OVP (POR)
12h
PMMSWPOR (POR)
14h
WDT timeout (PUC)
16h
WDT password violation (PUC)
18h
KEYV flash password violation (PUC)
1Ah
FLL unlock (PUC)
1Ch
Peripheral area fetch (PUC)
1Eh
PMM password violation (PUC)
20h
Reserved
22h to 3Eh
Lowest
SYSSNIV , System NMI
019Ch
No interrupt pending
00h
SVMLIFG
02h
Highest
SVMHIFG
04h
SVSMLDLYIFG
06h
SVSMHDLYIFG
08h
VMAIFG
0Ah
JMBINIFG
0Ch
JMBOUTIFG
0Eh
SVMLVLRIFG
10h
SVMHVLRIFG
12h
Reserved
14h to 1Eh
Lowest
SYSUNIV, User NMI
019Ah
No interrupt pending
00h
NMIFG
02h
Highest
OFIFG
04h
ACCVIFG
06h
Reserved
08h
Reserved
0Ah to 1Eh
Lowest
Copyright 2009–2010, Texas Instruments Incorporated
19
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