參數(shù)資料
型號： MSP430F5505IRGZ
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PQCC48
封裝： PLASTIC, VQFN-48
文件頁數(shù)： 57/99頁
文件大?。?/td> 1134K
代理商： MSP430F5505IRGZ
PRODUCTPREVIEW
MSP430F550x
SLAS645B – JULY 2009 – REVISED JULY 2010
www.ti.com
USCI (UART Mode) Recommended Operating Conditions
PARAMETER
CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Internal: SMCLK, ACLK
fUSCI
USCI input clock frequency
External: UCLK
fSYSTEM
MHz
Duty cycle = 50% ± 10%
BITCLK clock frequency
fBITCLK
1
MHz
(equals baud rate in MBaud)
USCI (UART Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
2.2 V
50
600
tt
UART receive deglitch time(1)
ns
3 V
50
600
(1)
Pulses on the UART receive input (UCxRX) shorter than the UART receive deglitch time are suppressed. To ensure that pulses are
correctly recognized their width should exceed the maximum specification of the deglitch time.
USCI (SPI Master Mode) Recommended Operating Conditions
PARAMETER
CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Internal: SMCLK, ACLK
fUSCI
USCI input clock frequency
fSYSTEM
MHz
Duty cycle = 50% ± 10%
USCI (SPI Master Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(see Note
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
SMCLK, ACLK
fUSCI
USCI input clock frequency
fSYSTEM
MHz
Duty cycle = 50% ± 10%
1.8 V
55
PMMCOREV = 0
ns
3.0 V
38
tSU,MI
SOMI input data setup time
2.4 V
30
PMMCOREV = 3
ns
3.0 V
25
1.8 V
0
PMMCOREV = 0
ns
3.0 V
0
tHD,MI
SOMI input data hold time
2.4 V
0
PMMCOREV = 3
ns
3.0 V
0
1.8 V
20
UCLK edge to SIMO valid,
ns
CL = 20 pF, PMMCOREV = 0
3.0 V
18
tVALID,MO
SIMO output data valid time(2)
2.4 V
16
UCLK edge to SIMO valid,
ns
CL = 20 pF, PMMCOREV = 3
3.0 V
15
1.8 V
-10
CL = 20 pF, PMMCOREV = 0
ns
3.0 V
-8
tHD,MO
SIMO output data hold time(3)
2.4 V
-10
CL = 20 pF, PMMCOREV = 3
ns
3.0 V
-8
(1)
fUCxCLK = 1/2tLO/HI with tLO/HI ≥ max(tVALID,MO(USCI) + tSU,SI(Slave), tSU,MI(USCI) + tVALID,SO(Slave)).
For the slave's parameters tSU,SI(Slave) and tVALID,SO(Slave) see the SPI parameters of the attached slave.
(2)
Specifies the time to drive the next valid data to the SIMO output after the output changing UCLK clock edge. See the timing diagrams
(3)
Specifies how long data on the SIMO output is valid after the output changing UCLK clock edge. Negative values indicate that the data
on the SIMO output can become invalid before the output changing clock edge observed on UCLK. See the timing diagrams in
60
Copyright 2009–2010, Texas Instruments Incorporated
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MSP430F5505IRGZR 功能描述:16位微控制器 - MCU Mixed Signal MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT
MSP430F5505IRGZT 功能描述:16位微控制器 - MCU Mixed Signal MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT
MSP430F5506IRGZR 功能描述:16位微控制器 - MCU Mixed Signal MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT
MSP430F5506IRGZT 功能描述:16位微控制器 - MCU Mixed Signal MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT
MSP430F5507IRGZR 功能描述:16位微控制器 - MCU Mixed Sig MCU RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風格:SMD/SMT
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