參數(shù)資料
型號： MSP430F5505IRGZ
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PQCC48
封裝： PLASTIC, VQFN-48
文件頁數(shù)： 7/99頁
文件大小： 1134K
代理商： MSP430F5505IRGZ
PRODUCTPREVIEW
MSP430F550x
www.ti.com
SLAS645B – JULY 2009 – REVISED JULY 2010
Table 2. TERMINAL FUNCTIONS (continued)
TERMINAL
NO.
I/O(1)
DESCRIPTION
NAME
RGZ
RGC
ZQE
/PT
General-purpose digital I/O with reconfigurable port mapping secondary
P4.5/PM_UCA1RXD/
function
46
34
C9
I/O
PM_UCA1SOMI
Default mapping: Receive data – USCI_A1 UART mode
Default mapping: Slave out, master in – USCI_A1 SPI mode
General-purpose digital I/O with reconfigurable port mapping secondary
P4.6/PM_NONE
47
35
C8
I/O
function
Default mapping: no secondary function.
General-purpose digital I/O with reconfigurable port mapping secondary
P4.7/PM_NONE
48
36
C7
I/O
function
Default mapping: no secondary function.
B8,
VSSU
49
37
USB PHY ground supply
B9
General-purpose digital I/O - controlled by USB control register
PU.0/DP
50
38
A9
I/O
USB data terminal DP
PUR
51
39
B7
I/O
USB pull-up resistor pin (open drain)
General-purpose digital I/O - controlled by USB control register
PU.1/DM
52
40
A8
I/O
USB data terminal DM
VBUS
53
41
A7
USB LDO input (connect to USB power source)
VUSB
54
42
A6
USB LDO output
V18
55
43
B6
USB regulated power (internal usage only, no external current loading)
AVSS2
56
44
A5
Analog ground supply
General-purpose digital I/O
P5.2/XT2IN
57
45
B5
I/O
Input terminal for crystal oscillator XT2
General-purpose digital I/O
P5.3/XT2OUT
58
46
B4
I/O
Output terminal of crystal oscillator XT2
Test mode pin – select digital I/O on JTAG pins
TEST/SBWTCK
59
47
A4
I
Spy-bi-wire input clock
General-purpose digital I/O
PJ.0/TDO
60
23
C5
I/O
Test data output port
General-purpose digital I/O
PJ.1/TDI/TCLK
61
24
C4
I/O
Test data input or test clock input
General-purpose digital I/O
PJ.2/TMS
62
25
A3
I/O
Test mode select
General-purpose digital I/O
PJ.3/TCK
63
26
B3
I/O
Test clock
Reset input active low
RST/NMI/SBWTDIO
64
48
A2
I/O
Non-maskable interrupt input
Spy-bi-wire data input/output
General-purpose digital I/O
P6.0/CB0/A0
1
A1
I/O
Comparator_B input CB0
Analog input A0 – ADC (not available on '5503, '5502, '5501, '5500 devices)
General-purpose digital I/O
P6.1/CB1/A1
2
B2
I/O
Comparator_B input CB1
Analog input A1 – ADC (not available on '5503, '5502, '5501, '5500 devices)
General-purpose digital I/O
P6.2/CB2/A2
3
B1
I/O
Comparator_B input CB2
Analog input A2 – ADC (not available on '5503, '5502, '5501, '5500 devices)
General-purpose digital I/O
P6.3/CB3/A3
4
C2
I/O
Comparator_B input CB3
Analog input A3 – ADC (not available on '5503, '5502, '5501, '5500 devices)
reserved
N/A
(3)
C6, D4, D5, D6, E3, E4, E5, E6, F3, F4, F5, F6, F7, F8, G3 are reserved and should be connected to ground.
Copyright 2009–2010, Texas Instruments Incorporated
15
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