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參數資料
| 型號： | MSP430F5510IRGC |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 25 MHz, RISC MICROCONTROLLER, PQCC64 |
| 封裝： | PLASTIC, VQFN-64 |
| 文件頁數： | 12/99頁 |
| 文件大?。?/td> | 1134K |
| 代理商： | MSP430F5510IRGC |
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PRODUCTPREVIEW
MSP430F550x
SLAS645B – JULY 2009 – REVISED JULY 2010
www.ti.com
DESCRIPTION
The Texas Instruments MSP430 family of ultralow-power microcontrollers consists of several devices featuring
different sets of peripherals targeted for various applications. The architecture, combined with extensive
low-power modes, is optimized to achieve extended battery life in portable measurement applications. The
device features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to
maximum code efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to
active mode in less than 5 s.
The MSP430F5510, MSP430F5509, MSP430F5508 devices are microcontroller configurations with integrated
USB and PHY supporting USB 2.0, four 16-bit timers, a high-performance 10-bit analog-to-digital converter
(ADC), two universal serial communication interfaces (USCI), hardware multiplier, DMA, real-time clock module
with alarm capabilities, and 31 or 47 I/O pins.
The MSP430F5507, MSP430F5506, MSP430F5505, MSP430F5504 devices are configurations with integrated
USB and PHY supporting USB 2.0, four 16-bit timers, a high-performance 10-bit analog-to-digital converter
(ADC), two universal serial communication interfaces (USCI), hardware multiplier, DMA, real-time clock module
with alarm capabilities, and 31 I/O pins. The MSP430F5503, MSP430F5502, and MSP430FF5513 include all of
these peripherals but have a comparator instead of the 10-bit ADC.
Typical applications include analog and digital sensor systems, data loggers, etc., that require connectivity to
various USB hosts.
Family members available are summarized in Table 1.
Table 1. Family Members
USCI
PROGRAM
SRAM
ADC10_A
Comp_B
PACKAGE
CHANNEL A: CHANNEL B:
DEVICE
MEMORY
Timer_A(2)
Timer_B(3)
I/O
(KB)(1)
(CH)
TYPE
UART/LIN/Ir
SPI/ I2C
(KB)
DA/SPI
64 RGC,
10 ext / 2 int
8
47
80 ZQE
MSP430F5510
32
4 + 2
5, 3, 3
7
2
48 PT,
6 ext / 2 int
4
31
48 RGZ
64 RGC,
10 ext / 2 int
8
47
80 ZQE
MSP430F5509
24
4 + 2
5, 3, 3
7
2
48 PT,
6 ext / 2 int
4
31
48 RGZ,
64 RGC,
10 ext / 2 int
8
47
80 ZQE
MSP430F5508
16
4 + 2
5, 3, 3
7
2
48 PT,
6 ext / 2 int
4
31
48 RGZ,
MSP430F5507
32
4 + 2
5, 3, 3
7
1
6 ext / 2 int
-
31
48 RGZ
MSP430F5506
24
4 + 2
5, 3, 3
7
1
6 ext / 2 int
-
31
48 RGZ
MSP430F5505
16
4 + 2
5, 3, 3
7
1
6 ext / 2 int
-
31
48 RGZ
48 PT,
MSP430F5504
8
4 + 2
5, 3, 3
7
1
6 ext / 2 int
-
31
48 RGZ
MSP430F5503
32
4 + 2
5, 3, 3
7
1
-
4
31
48 RGZ
MSP430F5502
24
4 + 2
5, 3, 3
7
1
-
4
31
48 RGZ
MSP430F5501
16
4 + 2
5, 3, 3
7
1
-
4
31
48 RGZ
MSP430F5500
8
4 + 2
5, 3, 3
7
1
-
4
31
48 RGZ
(1)
The additional 2-KB USB SRAM that is listed can be used as general purpose SRAM when USB is not in use.
(2)
Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
(3)
Each number in the sequence represents an instantiation of Timer_B with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_B, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
2
Copyright 2009–2010, Texas Instruments Incorporated
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