參數(shù)資料
型號(hào): MSP430F6630IPZ
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁(yè)數(shù): 66/105頁(yè)
文件大小: 1077K
代理商: MSP430F6630IPZ
PRODUCTPREVIEW
MSP430F663x
www.ti.com
SLAS566A – JUNE 2010 – REVISED JULY 2010
12-Bit ADC, Timing Parameters (continued)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
Internal ADC12
fADC12OSC
ADC12DIV = 0, fADC12CLK = fADC12OSC
2.2 V/3 V
4.2
4.8
5.4
MHz
oscillator(1)
REFON = 0, Internal oscillator,
2.2 V/3 V
2.4
3.1
fADC12OSC = 4.2 MHz to 5.4 MHz
tCONVERT
Conversion time
s
External fADC12CLK from ACLK, MCLK or SMCLK,
(2)
ADC12SSEL
≠ 0
Turn on settling time of
tADC12ON
See (3)
100
ns
the ADC
RS = 400 , RI = 200 , CI = 20 pF,
tSample
Sampling time
2.2 V/3 V
1000
ns
t = [RS + RI] × CI
(4)
(1)
The ADC12OSC is sourced directly from MODOSC inside the UCS. At supply voltages below 2.2 V the ADC12OSC clock needs to be
divided by 2.
(2)
13 × ADC12DIV × 1/fADC12CLK
(3)
The condition is that the error in a conversion started after tADC12ON is less than ±0.5 LSB. The reference and input signal are already
settled.
(4)
Approximately ten Tau (t) are needed to get an error of less than ±0.5 LSB:
tSample = ln(2
n+1) x (R
S + RI) × CI + 800 ns, where n = ADC resolution = 12, RS = external source resistance
12-Bit ADC, Linearity Parameters
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
1.4 V
≤ (VeREF+ – VREF–/VeREF–)min ≤ 1.6 V
±2
Integral
EI
2.2 V/3 V
LSB
linearity error
1.6 V < (VeREF+ – VREF–/VeREF–)min ≤ VAVCC
±1.7
Differential
(VeREF+ – VREF–/VeREF–)min ≤ (VeREF+ – VREF–/VeREF–),
ED
2.2 V/3 V
±1
LSB
linearity error
CVREF+ = 20 pF
(VeREF+ – VREF–/VeREF–)min ≤ (VeREF+ – VREF–/VeREF–),
EO
Offset error
2.2 V/3 V
±1
±3.5
LSB
Internal impedance of source RS < 100 , CVREF+ = 20 pF
(VeREF+ – VREF–/VeREF–)min ≤ (VeREF+ – VREF–/VeREF–),
EG
Gain error
2.2 V/3 V
±1.1
±2
LSB
CVREF+ = 20 pF
Total unadjusted
(VeREF+ – VREF–/VeREF–)min ≤ (VeREF+ – VREF–/VeREF–),
ET
2.2 V/3 V
±2
±5
LSB
error
CVREF+ = 20 pF
12-Bit ADC, Temperature Sensor and Built-In VMID
(1)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
2.2 V
680
ADC12ON = 1, INCH = 0Ah,
VSENSOR
See (2)
mV
TA = 0°C
3 V
680
2.2 V
2.25
±3%
TCSENSOR
ADC12ON = 1, INCH = 0Ah
mV/°C
3 V
2.25
±3%
2.2 V
30
Sample time required if
ADC12ON = 1, INCH = 0Ah,
tSENSOR(sample)
s
channel 10 is selected(3)
Error of conversion result
≤ 1 LSB
3 V
30
2.2 V
1.06
1.1
1.14
ADC12ON = 1, INCH = 0Bh,
VMID
AVCC divider at channel 11
V
VMID is ~0.5 × VAVCC
3 V
1.46
1.5
1.54
Sample time required if
ADC12ON = 1, INCH = 0Bh,
tVMID(sample)
2.2 V/3 V
1000
ns
channel 11 is selected(4)
Error of conversion result
≤ 1 LSB
(1)
The temperature sensor is provided by the REF module. Please refer to the REF module parametric, IREF+, regarding the current
consumption of the temperature sensor.
(2)
The temperature sensor offset can be as much as ±20°C. A single-point calibration is recommended in order to minimize the offset error
of the built-in temperature sensor. The TLV structure contains calibration values for 30°C ± 3°C and 85°C ± 3°C for each of the available
reference voltage levels. The sensor voltage can be computed as VSENSE = TCSENSOR * (Temperature,°C) + VSENSOR, where TCSENSOR
and VSENSOR can be computed from the calibration values for higher accuracy. See also the MSP430x5xx Family User's Guide
(3)
The typical equivalent impedance of the sensor is 51 k
. The sample time required includes the sensor-on time tSENSOR(on).
(4)
The on-time tVMID(on) is included in the sampling time tVMID(sample); no additional on time is needed.
Copyright 2010, Texas Instruments Incorporated
63
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