參數(shù)資料
型號: MSP430FR5738IPW
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, 24 MHz, RISC MICROCONTROLLER, PDSO28
封裝: PLASTIC, TSSOP-28
文件頁數(shù): 14/76頁
文件大?。?/td> 1059K
代理商: MSP430FR5738IPW
PRODUCTPREVIEW
MSP430FR573x
MSP430FR572x
SLAS639
– APRIL 2011
Bootstrap Loader (BSL)
The BSL enables users to program the FRAM or RAM using a UART serial interface. Access to the device
memory via the BSL is protected by an user-defined password. Usage of the BSL requires four pins as shown in
Table 6. BSL entry requires a specific entry sequence on the RST/NMI/SBWTDIO and TEST/SBWTCK pins. For
complete description of the features of the BSL and its implementation, see the MSP430 Memory Programming
User
's Guide, literature number SLAU265.
Table 6. BSL Pin Requirements and Functions
DEVICE SIGNAL
BSL FUNCTION
RST/NMI/SBWTDIO
Entry sequence signal
TEST/SBWTCK
Entry sequence signal
P2.0
Data transmit
P2.1
Data receive
VCC
Power supply
VSS
Ground supply
JTAG Operation
JTAG Standard Interface
The MSP430 family supports the standard JTAG interface which requires four signals for sending and receiving
data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to enable the
JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO is required to interface with MSP430
development tools and device programmers. The JTAG pin requirements are shown in Table 7. For further
details on interfacing to development tools and device programmers, see the MSP430 Hardware Tools User
's
Guide, literature number SLAU278.
Table 7. JTAG Pin Requirements and Functions
DEVICE SIGNAL
Direction
FUNCTION
PJ.3/TCK
IN
JTAG clock input
PJ.2/TMS
IN
JTAG state control
PJ.1/TDI/TCLK
IN
JTAG data input/TCLK input
PJ.0/TDO
OUT
JTAG data output
TEST/SBWTCK
IN
Enable JTAG pins
RST/NMI/SBWTDIO
IN
External reset
VCC
Power supply
VSS
Ground supply
Spy-Bi-Wire Interface
In addition to the standard JTAG interface, the MSP430 family supports the two wire Spy-Bi-Wire interface.
Spy-Bi-Wire can be used to interface with MSP430 development tools and device programmers. The Spy-Bi-Wire
interface pin requirements are shown in Table 8. For further details on interfacing to development tools and
device programmers, see the MSP430 Hardware Tools User
's Guide, literature number SLAU278.
Table 8. Spy-Bi-Wire Pin Requirements and Functions
DEVICE SIGNAL
Direction
FUNCTION
TEST/SBWTCK
IN
Spy-Bi-Wire clock input
RST/NMI/SBWTDIO
IN, OUT
Spy-Bi-Wire data input/output
VCC
Power supply
VSS
Ground supply
Copyright
2011, Texas Instruments Incorporated
21
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