參數(shù)資料
型號(hào): MSP430FR5738IPW
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, 24 MHz, RISC MICROCONTROLLER, PDSO28
封裝: PLASTIC, TSSOP-28
文件頁(yè)數(shù): 4/76頁(yè)
文件大?。?/td> 1059K
代理商: MSP430FR5738IPW
PRODUCTPREVIEW
MSP430FR573x
MSP430FR572x
SLAS639
– APRIL 2011
Table 3. TERMINAL FUNCTIONS
TERMINAL
NO.
I/O(1)
DESCRIPTION
NAME
RH
RG
DA
PW
A
E
General-purpose digital I/O with port interrupt and wake up from LPMx.5
TA0 CCR1 capture: CCI1A input, compare: Out1
External DMA trigger
P1.0/TA0.1/DMAE0/
1
5
I/O
RTC clock calibration output
RTCCLK/A0/CD0/VeREF-
Analog input A0
– ADC (not available on devices without ADC)
Comparator_D input CD0
External applied reference voltage (not available on devices without ADC)
General-purpose digital I/O with port interrupt and wake up from LPMx.5
TA0 CCR2 capture: CCI2A input, compare: Out2
TA1 input clock
P1.1/TA0.2/TA1CLK/
Comparator_D output
2
6
I/O
CDOUT/A1/CD1/VeREF+
Analog input A1
– ADC (not available on devices without ADC)
Comparator_D input CD1
Input for an external reference voltage to the ADC (not available on
devices without ADC)
General-purpose digital I/O with port interrupt and wake up from LPMx.5
TA1 CCR1 capture: CCI1A input, compare: Out1
P1.2/TA1.1/TA0CLK/
TA0 input clock
3
7
I/O
CDOUT/A2/CD2
Comparator_D output
Analog input A2
– ADC (not available on devices without ADC)
Comparator_D input CD2
General-purpose digital I/O with port interrupt and wake up from LPMx.5
(not available on package options PW, RGE)
P3.0/A12/CD12
4
N/A
8
N/A
I/O
Analog input A12
– ADC (not available on devices without ADC or package
options PW, RGE)
Comparator_D input CD12 (not available on package options PW, RGE)
General-purpose digital I/O with port interrupt and wake up from LPMx.5
(not available on package options PW, RGE)
P3.1/A13/CD13
5
N/A
9
N/A
I/O
Analog input A13
– ADC (not available on devices without ADC or package
options PW, RGE)
Comparator_D input CD13 (not available on package options PW, RGE)
General-purpose digital I/O with port interrupt and wake up from LPMx.5
(not available on package options PW, RGE)
P3.2/A14/CD14
6
N/A
10
N/A
I/O
Analog input A14
– ADC (not available on devices without ADC or package
options PW, RGE)
Comparator_D input CD14 (not available on package options PW, RGE)
General-purpose digital I/O with port interrupt and wake up from LPMx.5
(not available on package options PW, RGE)
P3.3/A15/CD15
7
N/A
11
N/A
I/O
Analog input A15
– ADC (not available on devices without ADC or package
options PW, RGE)
Comparator_D input CD15 (not available on package options PW, RGE)
General-purpose digital I/O with port interrupt and wake up from LPMx.5
TA1 CCR2 capture: CCI2A input, compare: Out2
P1.3/TA1.2/UCB0STE/
8
4
12
8
I/O
Slave transmit enable
– eUSCI_B0 SPI mode
A3/CD3
Analog input A3
– ADC (not available on devices without ADC)
Comparator_D input CD3
General-purpose digital I/O with port interrupt and wake up from LPMx.5
TB0 CCR1 capture: CCI1A input, compare: Out1
P1.4/TB0.1/UCA0STE/
9
5
13
9
I/O
Slave transmit enable
– eUSCI_A0 SPI mode
A4/CD4
Analog input A4
– ADC (not available on devices without ADC)
Comparator_D input CD4
General-purpose digital I/O with port interrupt and wake up from LPMx.5
TB0 CCR2 capture: CCI2A input, compare: Out2
P1.5/TB0.2/UCA0CLK/
Clock signal input
– eUSCI_B0 SPI slave mode; Clock signal output –
10
6
14
10
I/O
A5/CD5
eUSCI_B0 SPI master mode
Analog input A5
– ADC (not available on devices without ADC)
Comparator_D input CD5
(1)
I = input, O = output, N/A = not available
12
Copyright
2011, Texas Instruments Incorporated
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