參數(shù)資料
型號(hào)： MSP430P112IDWR
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 16-BIT, OTPROM, 5.35 MHz, RISC MICROCONTROLLER, PDSO20
封裝： GREEN, PLASTIC, SOIC-20
文件頁數(shù)： 29/32頁
文件大?。?/td> 535K
代理商： MSP430P112IDWR
MSP430x11x
MIXED SIGNAL MICROCONTROLLERS
SLAS196D DECEMBER 1998 REVISED SEPTEMBER 2004
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
interrupt vector addresses
The interrupt vectors and the power-up starting address are located in the ROM with an address range of
0FFFFh-0FFE0h. The vector contains the 16-bit address of the appropriate interrupt handler instruction
sequence.
INTERRUPT SOURCE
INTERRUPT FLAG
SYSTEM INTERRUPT
WORD ADDRESS
PRIORITY
Power-up, external reset, watchdog
WDTIFG (see Note1)
Reset
0FFFEh
15, highest
NMI, oscillator fault
NMIIFG, OFIFG (see Note 1)
(non)-maskable,
(non)-maskable
0FFFCh
14
0FFFAh
13
0FFF8h
12
0FFF6h
11
Watchdog Timer
WDTIFG
maskable
0FFF4h
10
Timer_A3
TACCR0 CCIFG (see Note 2)
maskable
0FFF2h
9
Timer_A3
TACCR1 and TACCR2
CCIFGs, TAIFG
(see Notes 1 and 2)
maskable
0FFF0h
8
0FFEEh
7
0FFECh
6
0FFEAh
5
0FFE8h
4
I/O Port P2 (eight flags see Note 3)
P2IFG.0 to P2IFG.7
(see Notes 1 and 2)
maskable
0FFE6h
3
I/O Port P1 (eight flags)
P1IFG.0 to P1IFG.7
(see Notes 1 and 2)
maskable
0FFE4h
2
0FFE2h
1
0FFE0h
0, lowest
NOTES:
1. Multiple source flags
2. Interrupt flags are located in the module
3. There are eight Port P2 interrupt flags, but only six Port P2 I/O pins (P2.05) are implemented on the ’11x devices.
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