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參數(shù)資料
| 型號(hào)： | MSP53C691PM |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 數(shù)字信號(hào)處理 |
| 英文描述： | 8-BIT, 12.32 MHz, MIXED DSP, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁(yè)數(shù)： | 9/14頁(yè) |
| 文件大?。?/td> | 203K |
| 代理商： | MSP53C691PM |
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MSP53C691
MIXED-SIGNAL PROCESSOR
SPSS030A – DECEMBER 2000 – REVISED FEBRUARY 2001
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
NAME
PIN
NO.
PAD
NO.
I/O
DESCRIPTION
DATA0–DATA3
39–36
25–22
I/O
Data bits 0 through 3 (in 4-bit or 8-bit mode)
DATA4 or
DATA/COMMAND
35
21
I/O
Data bit 4 (in 8-bit mode)
Data/command control bit (in 4-bit mode). Low signal indicates command and high signal
indicates data.
DATA5–DATA7
34–32
20–18
I/O
Data bits 5 through 7 (8-bit mode only)
Not used (4-bit mode only)
INRDY
6
O
An output signal from the slave to the microcontroller. A low signal indicates that the
MSP53C691 is ready to accept data or command. A high signal indicates that the
MSP53C691 is busy and the microcontroller must not write any data or command to it.
OUTRDY
5
O
An output signal from the slave to the microcontroller. A low signal indicates that the
MSP53C691 is ready to send data or command to the microcontroller.
PD4–PD7
43–40
29–26
I/O
General-purpose I/O bus
R/W
3
I
An input signal to the slave from the microcontroller. Read/write select signal which is set
high for read operations or set low for write operations by the microcontroller.
STROBE
4
I
An input signal to the slave from the microcontroller. STROBE sequences read or write
operations in conjunction with the R/W signal. This signal is pulsed high-low-high for read or
write operations sequencing.
Reference Oscillator Signals
OSCOUT
15
O
Output of resistor/crystal oscillator
OSCIN
14
I
Input to resistor/crystal oscillator
PLL
13
O
Output of phase-lock-loop filter
Scan Port Control Signals
SCANIN
11
39
I
Scan port data input
SCANOUT
8
35
O
Scan port data output
SCANCLK
10
38
I
Scan port clock
SYNC
9
37
I
Scan port synchronization
TEST
7
36
I
C604: test modes
Digital-to-Analog Sound Output
DACP
47
33
O
Digital-to-analog plus output (+)
DACM
45
31
O
Digital-to-analog minus output(–)
Initialization
RESET
12
I
Device initialization
Power Signals
VDD
1, 2, 31,
44, 46
1, 2, 17,
30, 32
—
Processor power, 5 V nominal supply voltage
VSS
16, 48,
49, 64
16, 34,
35, 36
—
Ground pin
All pins must be N.C.
Marked pins are VDD and VSS connections which service the DAC circuitry. These pins tend to sustain a higher current draw. A dedicated
decoupling capacitor across these pins is therefore required.
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