參數(shù)資料
型號: MT58L512L18DS-7.5IT
元件分類: SRAM
英文描述: 512K X 18 CACHE SRAM, 4 ns, PQFP100
封裝: PLASTIC, MS-026BHA, TQFP-100
文件頁數(shù): 28/31頁
文件大?。?/td> 613K
代理商: MT58L512L18DS-7.5IT
6
8Mb: 512K x 18, 256K x 32/36 3.3V I/O, Pipelined, DCD SyncBurst SRAM
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT58L512L18D_C.p65 – Rev. 6/01
2001, Micron Technology, Inc.
8Mb: 512K x 18, 256K x 32/36
3.3V I/O, PIPELINED, DCD SYNCBURST SRAM
PIN ASSIGNMENT (TOP VIEW)
100-PIN TQFP, 3-CHIP ENABLE,
S VERSION
SA
ADV#
ADSP#
ADSC#
OE#
BWE#
GW#
CLK
VSS
VDD
CE2#
BWa#
BWb#
NC
CE2
CE#
SA
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
SA
NC
V
DD
Q
V
SS
NC
DQPa
DQa
V
SS
V
DD
Q
DQa
V
SS
NC
V
DD
ZZ
DQa
V
DD
Q
V
SS
DQa
NC
V
SS
V
DD
Q
NC
SA
NF
VDD
VSS
DNU
SA0
SA1
SA
MODE
NC
V
DD
Q
V
SS
NC
DQb
V
SS
V
DD
Q
DQb
V
DD
V
DD
NC
V
SS
DQb
V
DD
Q
V
SS
DQb
DQPb
NC
V
SS
V
DD
Q
NC
x18
SA
ADV#
ADSP#
ADSC#
OE#
BWE#
GW#
CLK
VSS
VDD
CE2#
BWa#
BWb#
BWc#
BWd#
CE2
CE#
SA
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
NF/
DQPb
*
DQb
V
DD
Q
V
SS
DQb
V
SS
V
DD
Q
DQb
V
SS
NC
V
DD
ZZ
DQa
V
DD
Q
V
SS
DQa
V
SS
V
DD
Q
DQa
NF/
DQPa
*
SA
NF
VDD
VSS
DNU
SA0
SA1
SA
MODE
NF/
DQPc
*
DQc
V
DD
Q
V
SS
DQc
V
SS
V
DD
Q
DQc
V
DD
V
DD
NC
V
SS
DQd
V
DD
Q
V
SS
DQd
V
SS
V
DD
Q
DQd
NF/
DQPd
*
x32/x36
*No Function (NF) is used on the x32 version. Parity (DQPx) is used on the x36 version.
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