參數(shù)資料
型號(hào): MT80C51C-12D
廠商: TEMIC SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44
文件頁(yè)數(shù): 140/170頁(yè)
文件大小: 4133K
代理商: MT80C51C-12D
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71
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
read by the CPU, the high byte of the 16-bit register is copied into the temporary register in the same clock cycle as
the low byte is read.
Not all 16-bit accesses uses the temporary register for the high byte. Reading the OCR0A/B 16-bit registers does
not involve using the temporary register.
To do a 16-bit write, the high byte must be written before the low byte. For a 16-bit read, the low byte must be read
before the high byte.
The following code example shows how to access the 16-bit timer registers assuming that no interrupts updates
the temporary register. The same principle can be used directly for accessing the OCR0A/B and ICR0 Registers.
Note:
The code example returns the TCNT0 value in the r17:r16 register pair.
It is important to notice that accessing 16-bit registers are atomic operations. If an interrupt occurs between the two
instructions accessing the 16-bit register, and the interrupt code updates the temporary register by accessing the
same or any other of the 16-bit timer registers, then the result of the access outside the interrupt will be corrupted.
Therefore, when both the main code and the interrupt code update the temporary register, the main code must dis-
able the interrupts during the 16-bit access.
The following code example shows how to do an atomic read of the TCNT0 Register contents. Reading any of the
OCR0A/B or ICR0 Registers can be done by using the same principle.
Note:
Assembly Code Example
...
; Set TCNT
0 to 0x01FF
ldi
r17,0x01
ldi
r16,0xFF
out
TCNT
0H,r17
out
TCNT
0L,r16
; Read TCNT
0 into r17:r16
in
r16,TCNT
0L
in
r17,TCNT
0H
...
Assembly Code Example
TIM16_ReadTCNT
0:
; Save global interrupt flag
in
r18,SREG
; Disable interrupts
cli
; Read TCNT
0 into r17:r16
in
r16,TCNT
0L
in
r17,TCNT
0H
; Restore global interrupt flag
out
SREG,r18
ret
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