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參數(shù)資料
| 型號(hào)： | MT80C51C-12R |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44 |
| 文件頁(yè)數(shù)： | 34/109頁(yè) |
| 文件大?。?/td> | 10824K |
| 代理商： | MT80C51C-12R |
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279
7593L–AVR–09/12
AT90USB64/128
7 - Reserved
The value read from these bits is always 0. Do not set these bits.
6-4 - EPSIZE2:0 - Endpoint Size bits
Set this bit according to the endpoint size:
000b: 8 bytes
100b: 128 bytes (only for endpoint 1)
001b: 16 bytes
101b: 256 bytes (only for endpoint 1)
010b: 32 bytes
110b: Reserved. Do not use this configuration
011b: 64 bytes
111b: Reserved. Do not use this configuration
3-2 - EPBK1:0 - Endpoint Bank bits
Set this field according to the endpoint size:
00b: One bank
01b: Double bank
1xb: Reserved. Do not use this configuration
1 - ALLOC - Endpoint Allocation bit
Set this bit to allocate the endpoint memory.
Clear to free the endpoint memory.
See Section 23.6, page 263 for more details.
0 - Reserved
The value read from these bits is always 0. Do not set these bits.
7 - CFGOK - Configuration Status flag
Set by hardware when the endpoint X size parameter (EPSIZE) and the bank parametrization
(EPBK) are correct compared to the max FIFO capacity and the max number of allowed bank.
This bit is updated when the bit ALLOC is set.
If this bit is cleared, the user should reprogram the UECFG1X register with correct EPSIZE and
EPBK values.
Bit
7
6
5
4
3
2
1
0
-
EPSIZE2:0
EPBK1:0
ALLOC
-
UECFG1X
Read/write
R
R/W
R
Initial value
0
Bit
765
4
3
2
1
0
CFGOK
OVERFI
UNDERFI
-
DTSEQ1:0
NBUSYBK1:0
UESTA0X
Read/write
R
R/W
R
Initial value
0
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相關(guān)代理商/技術(shù)參數(shù) |
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