參數(shù)資料
型號(hào): MT8952BPR
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 2.5M bps, SERIAL COMM CONTROLLER, PQCC28
封裝: PLASTIC, MS-018AB, LCC-28
文件頁數(shù): 21/32頁
文件大小: 602K
代理商: MT8952BPR
MT8952B
Data Sheet
28
Zarlink Semiconductor Inc.
Timing is over recommended temperature & power supply voltages (VDD=5V±5%, VSS=0V, TA=–40 to 85°C).
Typical figures are at 25
°C and are for design aid only: not guaranteed and not subject to production testing.
Figure 25 - Serial Port Input and Output in ST-BUS Format (Internal Timing Mode)
Note:
1. Channels 0 to 4 can only be active on CDSTi and CDSTo in the Internal Timing Mode.
2. Clock input CKi can be either of the ST-BUS clocks C2i (2.048MHz) or C4i (4.096 MHz) in the Internal Timing Mode.
3. The Frame Pulse set up and hold time measurements are to be referenced from the falling edge of C4i or the rising edge of C2i depending on the clock
selected.
Figure 26 - Test Load Circuits
Note: Active Low to High impedance times are measured from the disabling signal edge to the time when Vout has increased by 0.5 volts. Active High to High impedance
times are measured from the disabling signal edge to the time when Vout has decreased by 0.5 volts.
6
CDSTi hold time
tSTiH
65
ns
7
C2i clock period
tC2i
400
ns
8C4i clock period
tC4i
200
ns
AC Electrical Characteristics - Serial Port in Internal Timing Mode - (Figure 25)
Voltages are with respect to ground (VSS) unless otherwise stated.
Characteristics
Sym.
Min.
Typ.
Max.
Units
Test Conditions
F0i
CKi
(C4i)
CKi
(C2i)
CDSTo
CDSTi
tF0iW
tF0iH
tC4i
tF0iS
tC2i
tSToZL
tSToZH
HIGH IMPEDANCE
Ch. 0
Bit 7
Ch. 0
Bit 6
Ch. 0
Bit 5
tSTiH
tSTiS
Ch. 31
Bit 0
Ch. 0
Bit 7
Ch. 0
Bit 6
Ch. 0
Bit 5
From
output
under test
Test
point
CL
Test load circuit- 1
VDD
RL=1k
Test
point
From
output
under test
Test load circuit- 2
Test load circuit - 3
From
output
under test
CL
Test
point
S1
VDD
VSS
RL=1k
Note: S1 is in position A
when measuring tPLZ
and in position B when
measuring tPHZ. See
note below.
CL= 200 pF for
on Data Bus
150 pF for
measurements
on CDSTo
50 pF for
others
measurements
A
B
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