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參數(shù)資料
| 型號(hào)： | MT8980 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | () |
| 中文描述： | （） |
| 文件頁(yè)數(shù)： | 10/11頁(yè) |
| 文件大?。?/td> | 80K |
| 代理商： | MT8980 |
MSAN-123
Application Note
A-114
Figure 8 - CSTo Bits Compared to ST-BUS Timing
CSTo
ST-BUS
Bit
timing
ST7/CH31
ST0/CH0
ST1/CH0
ST2/CH0
CH30/B0
CH31/B7
CH31/B6
CH31/B5
ST7/CH0
ST0/CH1
CH31/B0
CH0/B7
Start of CSTo frame
Start of regular frame
CH31/B6 = Channel 31, Bit 6
ST2/CH0 = Stream2, Channel 0
be useful for performing system level diagnostics on
matrices of MT8980s.
Another use for the CSTo bits is in the
astronavigation of the microprocessor with ST-BUS
timing. CSTo could notify the microprocessor that a
predetermined position in the ST-BUS timing has
occurred. For example, to mark Channel 7 entering
the MT8980, clearing all CSTo bits except the
CMH
b
1 of STo0 Channel 9 would produce a
waveform that had a recurring, high-going, bit-wide
pulse immediately following the last bit of Channel 7.
Figure 8 shows the relationship between CSTo bits,
ST-BUS timing and the Connection Memory High
bytes producing the bits.
7.0 High Impedance Capability
The MT8980 has the capability to put individual
channels into a high impedance state, so large
switching matrices may be constructed with multiple
MT8980’s. The ODE input, when it is low, forces all
ST-BUS channels into the high impedance condition.
When it is high, each channel is controlled by its
individual CMH
b
0. When the CMH
b
0 is logical ‘1’, the
channel is driving the ST-BUS. When the CMH
b
0 is
logical low, the ST-BUS is in the high impedance
state during the channel’s timeslot.
7.1 Initialization of the MT8980
On initialization or power up, the contents of the
Connection Memory High can be in any state. This is
a potentially hazardous condition when multiple
MT8980 ST-BUS outputs are tied together to form
matrices, as these outputs may conflict. The ODE
pin should be held low on power up to keep all
outputs in the high impedance condition.
During the microprocessor initialization routine, the
microprocessor should program the desired active
paths through the matrices, and put all other
channels into the high impedance state. Care should
be taken that no two connected ST-BUS outputs
drive the bus simultaneously. When this process is
complete,
the
microprocessor
matrices can bring the ODE signal high to relinquish
high impedance state control to the CMH
b
0s.
controlling
the
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT8980D | 制造商:ZARLINK 制造商全稱(chēng):Zarlink Semiconductor Inc 功能描述:ISO-CMOS ST-BUS Family Digital Switch |
| MT8980D-1 | 制造商:MITEL 制造商全稱(chēng):Mitel Networks Corporation 功能描述:ISO-CMOS ST-BUS⑩ FAMILY Digital Switch |
| MT8980DE | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256 5V 40PDIP - Rail/Tube 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 256 X 256 5V 40PDIP - Rail/Tube |
| MT8980DE1 | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 256 X 256 5V 40PDIP - Rail/Tube 制造商:Microsemi Corporation 功能描述:PB FREE DIGITAL SWITCH 制造商:Zarlink Semiconductor Inc 功能描述:SWIT FABRIC 256 X 256 5V 40PDIP - Rail/Tube 制造商:Zarlink Semiconductor Inc 功能描述:PB FREE DIGITAL SWITCH |
| MT8980DP | 制造商:Mitel Networks Corporation 功能描述: 制造商:ZARLINK 功能描述: 制造商:Zarlink Semiconductor Inc 功能描述: |
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