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參數(shù)資料
| 型號(hào)： | MT9040 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | T1/E1 Synchronizer(T1/E1 系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）) |
| 中文描述： | 的T1/E1同步（T1/E1的系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）） |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 82K |
| 代理商： | MT9040 |
MT9040
Advance Information
6
The reference frequencies are selected by the
frequency control pins FS2 and FS1 as shown in
Table 1.
Fast Lock Mode
Fast Lock Mode is a submode of Normal Mode, it is
used to allow the MT9040 to lock to a reference more
quickly than Normal mode will allow. Typically, the
PLL will lock to the incoming reference within 500 ms
if the FLOCK pin is set high.
Freerun Mode
Freerun Mode is typically used when a master clock
source is required, or immediately following system
power-up
before
network
achieved.
synchronization
is
In Freerun Mode, the MT9040 provides timing and
synchronization signals which are based on the
master clock frequency (OSCi) only, and are not
synchronized to the reference signal.
The accuracy of the output clock is equal to the
accuracy of the master clock (OSCi). So if a
±
32ppm
output clock is required, the master clock must also
be
±
32ppm. See Applications - Crystal and Clock
Oscillator sections.
MT9040 Measures of Performance
The following are some synchronizer performance
indicators and their corresponding definitions.
Intrinsic Jitter
Intrinsic
synchronizing circuit and is measured at its output. It
is measured by applying a reference signal with no
jitter to the input of the device, and measuring its
output jitter. Intrinsic jitter may also be measured
when the device is free running by measuring the
output jitter of the device. Intrinsic jitter is usually
measured with various bandlimiting filters depending
on the applicable standards. In the MT9040, the
intrinsic Jitter is limited to less than 0.02UI on the
2.048MHz and 1.544MHz clocks.
jitter
is
the
jitter
produced
by
the
Jitter Tolerance
Jitter tolerance is a measure of the ability of a PLL to
operate properly (i.e., remain in lock and or regain
lock in the presence of large jitter magnitudes at
various jitter frequencies) when jitter is applied to its
reference. The applied jitter magnitude and jitter
frequency depends on the applicable standards.
Jitter Transfer
Jitter transfer or jitter attenuation refers to the
magnitude of jitter at the output of a device for a
given amount of jitter at the input of the device. Input
jitter
is
applied
at
various
frequencies, and output jitter is measured with
various
filters
depending
standards.
amplitudes
and
on
the
applicable
For the MT9040, the jitter attenuation is determined
by the 1.9Hz low pass loop filter.
The MT9040 has twelve outputs with three possible
input frequencies (except for 19.44MHz, which is
internally divided to 8KHz) for a total of 36 possible
jitter transfer functions. Since all outputs are derived
from the same signal, the jitter transfer values for the
four cases, 8kHz to 8kHz, 1.544MHz to 1.544MHz
and 2.048MHz to 2.048MHz can be applied to all
outputs.
It should be noted that 1UI at 1.544MHz is 644ns,
which is not equal to 1UI at 2.048MHz, which is
488ns. Consequently, a transfer value using different
input and output frequencies must be calculated in
common units (e.g., seconds) as shown in the
following example.
What is the T1 and E1 output jitter when the T1 input
jitter is 20UI (T1 UI Units) and the T1 to T1 jitter
attenuation is 18dB
Using the above method, the jitter attenuation can be
calculated for all combinations of inputs and outputs
based on the three jitter transfer functions provided.
Note that the resulting jitter transfer functions for all
combinations of inputs (8kHz, 1.544MHz, 2.048MHz)
and
outputs
(8kHz,
4.096MHz, 8.192MHz, 16.384MHz, 19.44MHz) for a
1.544MHz,
2.048MHz,
OutputT
1
InputT
1
A
–
20
------
×
10
20
=
OutputT
1
20
–
×
10
2.5
UI T
1
)
=
=
OutputE
1
OutputT
1
ns
488
ns
)
)
-644
3.3
UI T
1
)
=
×
=
OutputE
1
OutputT
1
UIT
1
1
UIE
1
(
)
)
-1
×
=
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PDF描述 |
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| MT9041B | T1/E1 System Synchronizer(T1/E1系統(tǒng)同步裝置（由一個(gè)數(shù)字鎖相環(huán)組成）) |
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