
MT9072
Data Sheet
224
Zarlink Semiconductor Inc.
5
F5RVS
(0)
Framer 5 Rx Line Vector Status.
This bit if unmasked is set if any of the bits in the Interrupt
Receive Line status register(535) are Framer 5 are set. This bit can be masked and will remain
low by theF1RM bit in address 903.
4
F5SVS
(0)
Framer 5 Sync Vector Status.
This bit if unmasked is set if any of the bits in the Interrupt Sync
status register(534) for Framer 5 are set. This bit can be masked and will remain low by the
F1SM bit in address 903.
3
F4HVS
(0)
Framer 4 HDLC Vector Status.
This bit if unmasked is set if any of the bits in the HDLC status
register(433)status for Framer 4 are set. This bit can be masked and will remain low by the
F7HM bit in address 903.
2
F4EVS
(0)
Framer 4 Elastic Vector Status.
This bit if unmasked is set if any of the bits in the Interrupt
Receive Elasitc store register(436) or Elastic store status for Framer 4 are set. This bit can be
masked and will remain low by the F4EM bit in address 903.
1
F4RVS
(0)
Framer 4 Rx Line Vector Status.
This bit if unmasked is set if any of the bits in the Interrupt
Receive Line status register(435) for Framer 4 are set. This bit can be masked and will remain
low by the F4RM bit in address 903.
0
F4SVS
(0)
Framer 4 Sync Vector Status.
This bit if unmasked is set if any of the bits in the Interrupt Sync
status register(434) Framer 4 are set. This bit can be masked and will remain low by the F4SM
bit in address 903.
Bit
Name
Functional Description
15-3
ID15-3
ID Number.
Contains 0100000001011.
2
1
0
ID2-0
(000)
These 3 bits make up a binary code which identify the revision of this deviceID Number.
Table 201 - Identification Revision Code Data Register (R Address 912) (E1)
Bit
Name
Functional Description
15-1
#
not used.
0
STIS
(0)
ST-BUS Analyser Interrupt Status.
This bit is set if the ST-BUS Analyser is filled up.
Table 202 - ST-BUS Analyzer Vector Status Register (Address 913) (E1)
Bit
Name
Functional Description
15-8
#
not used.
7-0
STAD
(7-0)
(0)
ST-BUS Analyser Data.
This is the data for the ST-BUS analyser buffer. 920 is the first byte of
the data that is being "analyzed". The source of the data can be any ST-BUS stream from any
Framer.
Table 203 - ST-BUS Analyser Data (Address 920-93F) (E1)
Bit
Name
Functional Description
Table 200 - Interrupt Vector 2 Status Register (Address 911) (E1)