參數(shù)資料
型號(hào)： MT9075BL
廠商： Mitel Networks Corporation
英文描述： E1 Single Chip Transceiver
中文描述： 素E1單芯片收發(fā)器
文件頁(yè)數(shù)： 34/78頁(yè)
文件大小： 1008K
代理商： MT9075BL
MT9075A
Preliminary Information
4-162
Table 21 - Interrupt, Signalling and BERT
Control Word (Page 01H, Address 1AH)
(continued)
Table 21 - Interrupt, Signalling and BERT
Control Word (Page 01H, Address 1AH)
Bit
Name
Functional Description
7
ODE
Output Data Enable.
If one, the
DSTo and CSTo output drivers
function normally. When low, DSTo
and CSTo will be tristated.
Note:
When ODE =1, DSTo and
CSTo can be individually tristated
by DSToDE and CSToDE (page
01H, address 16H) respectively.
6
SPND
Suspend Interrupts.
If one, the
IRQ output (pin 12 in PLCC, 85 in
MQFP) will be in a high-impedance
state and all interrupts will be
ignored. If zero, the IRQ output will
function normally.
5
INTA
Interrupt Acknowledge.
A zero-to-
one or one-to-zero transition will
clear any pending interrupt and
make IRQ high.
4
TxCCS
Transmit
Signalling.
If one, the transmit
section of the device is in common
channel signalling (CCS) mode. If
zero, it is in Channel Associated
Signalling (CAS) mode.
Common
Channel
3
RPSIG
Register
Signalling.
If one, the transmit CAS
signalling will be controlled by
programming page 05H. If zero, the
transmit CAS signalling will be
controlled through the CSTi stream.
Programmed
Bit
Name
Functional Description
2
CNTCLR
Counter Clear.
If one, all status
counters are cleared and held low.
Zero for normal operation.
1
MSN
Most
Nibble.
If one, the CSTo and CSTi
channel
associated
nibbles will be valid in the most
significant portion of each ST-BUS
time slot. If zero, the CSTo and
CSTi channel associated signalling
nibbles will be valid in the least
significant portion of each ST-BUS
time slot.
Significant
Signalling
signalling
0
64KCCS
64 Kbits/s Common Channel
Signalling.
If one, common channel
signalling information is sourced
from CSTi, and common channel
signalling information is clocked out
of CSTo. The transmit clock is an
internal clock. This 64 KHz clock is
divided down from C4b and is
synchronous
with
channel boundaries. The rising
edges of the clock occur between
channels 1 and 2; 5 and 6; 9 and
10; 13 and 14; 17 and 18; 21 and
22; 25 and 26; 29 and 30. The
receive clock is synchronous with
the same channel times, but derived
from the extracted clock timebase.
The CCS receive clock is driven out
on Rx64KCK (pin 47 in PLCC, 35 in
MQFP) when this bit is set.
the
STBUS
相關(guān)PDF資料
PDF描述
MT9075BP E1 Single Chip Transceiver
MT9075B-1 E1 Single Chip Transceiver
MT9075 ()
MT9076 T1/E1/J1 3.3V Single Chip Transceiver
MT9076AB T1/E1/J1 3.3V Single Chip Transceiver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MT9075BL1 制造商:Microsemi Corporation 功能描述:FRAMER E1 5V 100MQFP - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TXRX SGL E1 W/LIU 100MQFP 制造商:Microsemi Corporation 功能描述:IC TXRX SGL E1 W/LIU 100MQFP
MT9075BP 制造商:Microsemi Corporation 功能描述:
MT9075BP1 制造商:Microsemi Corporation 功能描述:Single Chip Transceiver 1TX 1RX 2.048Mbps 68-Pin PLCC Tube 制造商:Microsemi Corporation 功能描述:FRAMER E1 5V 68PLCC - Rail/Tube 制造商:Microsemi Corporation 功能描述:PB FREE E1 SINGLE CHIP TRANSCEIVER 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TXRX SGL E1 W/LIU 68PLCC 制造商:Microsemi Corporation 功能描述:IC TXRX SGL E1 W/LIU 68PLCC
MT9075BPR 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:E1 Single Chip Transceiver
MT9075BPR1 制造商:Microsemi Corporation 功能描述:FRAMER E1 5V 68PLCC - Tape and Reel
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*