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參數(shù)資料
| 型號(hào)： | MT9126 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad ADPCM Transcoder(四ADPCM編解碼器) |
| 中文描述： | 四差分PcM轉(zhuǎn)碼器（四差分PcM編解碼器） |
| 文件頁(yè)數(shù)： | 2/25頁(yè) |
| 文件大?。?/td> | 138K |
| 代理商： | MT9126 |
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MT9126
8-2
Figure 2 - Pin Connections
Pin Description
Pin #
Name
Description
1
EN1
Enable Strobe 1 (Output).
This 8 bit wide, active high strobe is active during the B1
PCM channel in ST-BUS mode. Becomes a single bit, high true pulse when LINEAR=1.
In SSI mode this output is high impedance.
2
MCLK/C4i
Master Clock/C4i (Input).
This is a 4.096 MHz (minimum) input clock utilized by the
transcoder function; it must be supplied in both ST-BUS and SSI modes of operation.
In ST-BUS mode the C4i ST-BUS clock is applied to this pin. This synchronous clock is
also used to control the data I/O flow on the PCM and ADPCM input/output pins
according to ST-BUS requirements.
In SSI mode this master clock input is derived from an external source and may be
asynchronous with respect to the 8 kHz frame. MCLK/C4i rates greater than 4.096 MHz
are acceptable in this mode since the data I/O rate is governed by BCLK.
3
F0i
Frame Pulse (Input).
Frame synchronization pulse input for ST-BUS operation. SSI
operation is enabled by connecting this pin to V
SS
.
2.048 MHz Clock (Output).
This ST-BUS mode bit clock output is the MCLK/C4i input
SSI operation.
4
C2o
5
BCLK
Bit Clock (Input).
128 kHz to 4096 kHz bit clock input for both PCM and ADPCM ports;
used in SSI mode only. The falling edge of this clock latches data into ADPCMi, PCMi1
and PCMi2. The rising edge clocks data out on ADPCMo, PCMo1 and PCMo2. This input
must be tied to V
SS
for ST-BUS operation.
6
PCMo1
Serial PCM Stream 1 (Output).
128 kbit/s to 4096 kbit/s serial companded/linear PCM
output stream. Data are clocked out by rising edge of BCLK in SSI mode. Clocked out by
MCLK/C4i divided by two in ST-BUS mode. See Figure 13.
7
PCMi1
Serial PCM Stream 1 (Input).
128 kbit/s to 4096 kbit/s serial companded/linear PCM
input stream. Data are clocked in on falling edge of BCLK in SSI mode. Clocked in at the
3/4 bit position of MCLK/C4i in ST-BUS mode. See Figure 13.
8
V
SS
Digital Ground.
Nominally 0 volts.
9
LINEAR
Linear PCM Select (Input)
. When tied to V
DD
the PCM I/O ports (PCM1,PCM2) are 16-
bit linear PCM. Linear PCM operates only at a bit rate of 2048 kbit/s. Companded PCM is
selected when this pin is tied to V
SS
. See Figures 5 & 8.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
28
27
26
25
24
23
22
21
MS1
IC
PWRDN
VDD
MS3
MS2
MS4
ADPCMo
FORMAT
A/
μ
ADPCMi
MS5
MS6
EN2
PCMo1
PCMi1
VSS
BCLK
LINEAR
ENB2/F0od
C2o
MCLK/C4i
F0i
PCMi2
SEL
ENB1
PCMo2
EN1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9126AE | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS Quad ADPCM Transcoder |
| MT9126AE1 | 制造商:Microsemi Corporation 功能描述:ADPCM VOICE COMPRESSION G.726 16KBPS/24KBPS/32KBPS 5V 28PDIP - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TRANSCODER QUAD ADPCM 28PDIP 制造商:Microsemi Corporation 功能描述:IC TRANSCODER QUAD ADPCM 28PDIP |
| MT9126AS | 制造商:Microsemi Corporation 功能描述: |
| MT9126AS1 | 制造商:Microsemi Corporation 功能描述:ADPCM VOICE COMPRESSION G.726 16KBPS/24KBPS/32KBPS 5V 28SOIC - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TRANSCODER QUAD ADPCM 28SOIC 制造商:Microsemi Corporation 功能描述:IC TRANSCODER QUAD ADPCM 28SOIC |
| MT9126ASR | 制造商:Microsemi Corporation 功能描述: |
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