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參數(shù)資料
| 型號： | MT9126 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad ADPCM Transcoder(四ADPCM編解碼器) |
| 中文描述： | 四差分PcM轉(zhuǎn)碼器（四差分PcM編解碼器） |
| 文件頁數(shù)： | 7/25頁 |
| 文件大?。?/td> | 138K |
| 代理商： | MT9126 |
MT9126
8-7
When the decoders are programmed for PCMo1/2
disable (MS4 to MS6 set to 1) the PCMo1/2 outputs
are high impedance during the B Channel timeslots
and also, during ST-BUS operation, the D and C
channel timeslots according to the state of ENB1.
Therefore convergence is maintained. The encode
processing function and data I/O remain active.
Whenever any combination of the encoders or
decoders are set to the disable mode the following
outputs remain active. A) ST-BUS mode: ENB2/
F0od, EN1, EN2 and C2o. Also the “D” and “C”
channels from PCMo1 and ADPCMo remain active if
ENB1 is set to 0. If ENB1 is brought high then
PCMo1 and ADPCMo are fully tri-stated. B) SSI
mode: When used in the 16-bit linear mode, only the
EN1 output remains active. For complete chip power
down see PWRDN.
Other Pin Controls
16 Bit Linear PCM
Setting the LINEAR pin to logic one causes the
device to change to 16-bit linear (uniform) PCM
transmission on the PCMi/o1 and PCMi/o2 ports.
The data rate for both ST-BUS and SSI operation in
this mode is 2048 kbit/s and all decode and encode
functions are affected by this pin. In SSI mode, the
input channel strobes ENB1 and ENB2/F0od remain
active for 8 cycles of BCLK for an ADPCM transfer.
The EN1 output is high for one BCLK period at the
end of the frame (i.e., during the 256
th
BCLK period).
In ST-BUS mode, the output strobes EN1 and ENB2/
F0od are adjusted to accommodate the required
PCM I/O streams. The EN1 output becomes a single
bit high true pulse during the last clock period of the
frame (i.e., the 256
th
bit period) while ENB2/F0od
becomes a delayed, low true frame-pulse (F0od)
output occuring during the 64
th
bit period after the
EN1 rising edge.
Linear PCM on PCMi1 and PCMi2, are received as
14-bit, two’s complement data with three bits of sign
extension in the most significant positions (i.e.,
S,S,S,12,...1,0) for a total of 16 bits. The linear PCM
data transmitted from PCMo1 and PCmo2 are 16-bit,
two’s complement data with one sign bit in the most
significant position (i.e., S,14,13,...1,0)
32 and 24 kbit/s ADPCM mode
In 32 kbit/s and 24 kbit/s linear mode, the 16-bit
uniform PCM dual-octets of the B1, B2, B3 and B4
channels (from PCMi1 and PCMi2) are compressed
into four 4-bit words on ADPCMo. The four 4-bit
ADPCM words of the B1, B2, B3 and B4 channels
from ADPCMi are expanded into four 16-bit uniform
PCM dual-octets on PCMo1 and PCMo2. 16-bit
uniform PCM are received and transmitted most
significant bit first starting with b15 and ending with
b0. ADPCM data are transferred most significant bit
first starting with I1 and ending with I4 for 32 kbit/s
and ending with I3 for 24 kbit/s operation (i.e., I4 is
don’t care).(See Figures 5 & 8.) Note that the SEL pin
performs no function in this mode.
16 kbit/sADPCM mode
When SEL is set to 0, the four, 2-bit ADPCM words
are transmitted/received on ADPCMo/i during the
ENB1 time-slot in SSI mode and during the B1
timeslot in ST-BUS mode. When SEL is set to 1, the
four,
2-bit ADPCM words are transmitted/received
on ADPCMo/i during the ENB2 timeslot in SSI mode
and during the B2 timeslot in ST-BUS mode. (See
Figures 5 & 8.)
PCM Law Control (A/
μ
, FORMAT)
The PCM companding/coding law invoked by the
transcoder is controlled via the A/
μ
and FORMAT
pins. ITU-T G.711 companding curves,
μ
-Law and
A-Law, are
selected
by the
1=A-Law). Per sample, digital code assignment can
conform to ITU-T G.711 (when FORMAT=1) or to
Sign-Magnitude coding (when FORMAT=0). Table 1
illustrates these choices.
A/
μ
pin (0=
μ
-Law;
Table 1 - Companded PCM
Power Down
Setting the PWRDN pin low will asynchronously
cause all internal operation to halt and the device to
go to a power down condition where no internal
clocks are running. Output pins C2o, EN1, EN2,
PCMo1, PCMo2 and ADPCMo and I/O pin F0od/
ENB2
are
forced
to
a
high-impedance
state.
FORMAT
0
1
PCM Code
Sign-
Magnitude
A/
μ
= 0 or 1
ITU-T (G.711)
(A/
μ
= 0)
(A/
μ
= 1)
+ Full Scale
1111 1111
1000 0000 1010 1010
+ Zero
1000 0000
1111 1111 1101 0101
- Zero
0000 0000
0111 1111 0101 0101
- Full Scale
0111 1111
0000 0000 0010 1010
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT9126AE | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:CMOS Quad ADPCM Transcoder |
| MT9126AE1 | 制造商:Microsemi Corporation 功能描述:ADPCM VOICE COMPRESSION G.726 16KBPS/24KBPS/32KBPS 5V 28PDIP - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TRANSCODER QUAD ADPCM 28PDIP 制造商:Microsemi Corporation 功能描述:IC TRANSCODER QUAD ADPCM 28PDIP |
| MT9126AS | 制造商:Microsemi Corporation 功能描述: |
| MT9126AS1 | 制造商:Microsemi Corporation 功能描述:ADPCM VOICE COMPRESSION G.726 16KBPS/24KBPS/32KBPS 5V 28SOIC - Rail/Tube 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC TRANSCODER QUAD ADPCM 28SOIC 制造商:Microsemi Corporation 功能描述:IC TRANSCODER QUAD ADPCM 28SOIC |
| MT9126ASR | 制造商:Microsemi Corporation 功能描述: |
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