參數(shù)資料
型號: MTA81010-LPI/P
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 18/76頁
文件大?。?/td> 745K
代理商: MTA81010-LPI/P
1995 Microchip Technology Inc.
DS39005D-page 25
MTA81010
9.0
BASIC INSTRUCTION SET
SUMMARY
Each PIC16C54 instruction is a 12-bit word divided into
an OPCODE which specifies the instruction type and
one or more operands which further specify the
operation of the instruction. The PIC16C54 instruction
set summary in Table 9-1 lists byte-oriented, bit-
oriented, and literal and control operations.
For byte-oriented instructions, "f" represents a file
register designator and "d" represents a destination
designator. The file register designator specifies which
one of the thirty-two PIC16C54 file registers is to be
utilized by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If "d" is zero, the result is
placed in the W register. If "d" is one, the result is
placed in the file register specified in the instruction.
For bit-oriented instructions, "b" represents a bit field
designator which selects the number of the bit affected
by the operation, while "f" represents the number of the
file in which the bit is located.
For literal and control operations, "k" represents an
eight or nine bit constant or literal value.
All instructions
are
executed
within
one
single
instruction cycle, unless a conditional test is true or the
program counter is changed as a result of an
instruction. In this case, the execution takes two
instruction cycles. One instruction cycle consists of four
oscillator periods. Thus, for an oscillator frequency of
4 MHz, the normal instruction execution time is 1
s. If
a conditional test is true or the program counter is
changed as a result of an instruction, the instruction
execution time is 2
s.
Notes to Table 9-1
Note 1: The 9th bit of the program counter will be
forced to a "zero" by any instruction that
writes to the PC (f2) except for GOTO
(e.g., CALL,
MOVWF
2
etc.).
See
Section 3.3 for details.
Note 2: When an I/O register is modified as a
function of itself (e.g., MOVF 6,1), the value
used will be that value present on the pins
themselves. For example, if the data latch is
"1" for a pin configured as output and is
driven low by an external device, the data
will be written back with a '0'.
Note 3: The instruction "TRIS f", where f = 5 or 6
causes the contents of the W register to be
written to the tristate latches of the specified
file (port). A "one" forces the pin to a high
impedance state and disables the output
buffers.
Note 4: If this instruction is executed on file register
f1
(and,
where
applicable,
d=1),
the
prescaler will be cleared if assigned to the
T0CKI.
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MTA81010S-RCI/SO 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO28
MTA81010-XTI/P 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDIP28
MTA81010T-XT/SO 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO28
MTA81010S-XTI/SO 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO28
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