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參數(shù)資料
| 型號： | MTA81010S-RCI/SO |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO28 |
| 封裝： | 0.300 INCH, SOIC-28 |
| 文件頁數(shù)： | 7/76頁 |
| 文件大?。?/td> | 745K |
| 代理商： | MTA81010S-RCI/SO |
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1995 Microchip Technology Inc.
DS39005D-page 15
MTA81010
3.2.3
STATUS REGISTER
This register contains the arithmetic status of the ALU,
the RESET status, and the page preselect bits for
program memories larger than 512 words .
As with any other register, the STATUS register can be
the destination for any instruction. However, the
STATUS bits are set
after the
following
write.
Furthermore, the TO and PD bits are not writable.
Therefore, the result of an instruction with STATUS
register as destination may be different than intended.
For example, CLRF STATUS will clear all bits except for
TO and PD and then set the Z bit and leave status
register as 000u u100 (where u = unchanged).
Therefore, only BCF, BSF and MOVWF instructions
should be used to alter the STATUS register because
these instructions do not affect any STATUS bit.
For other instructions, which do affect STATUS bits,
see Table 9-1, Instruction Set Summary.
FIGURE 3-9:
STATUS REGISTER
C: Carry/borrow bit.
For ADDWF and ADDLW instructions.
1 =
0 =
Use of the PA2 bit as a general purpose read/write bit is not recommended,
since this may affect upward compatibility with future products.
A carry-out from the most significant bit of the result occurred
Note that a subtraction is executed by adding the two's
complement of the second operand. For rotate (RRF, RLF)
instructions, this bit is loaded with either the high or low order bit
of the source register.
No carry-out from the most significant bit of the result
DC: Digit carry/borrow bit.
For ADDWF and ADDLW instructions.
1 =
0 =
Z: Zero bit
1 =
0 =
PD: Power-down bit
1 =
0 =
TO: Time-out bit
1 =
0 =
PA1:PA0: Program Page Pre-select bits
PA2
PA1
PA0
TO
PD
ZDC
C
bit0
R/W
R
R/W
bit7
A carry-out from the 4th low order bit of the result occurred
No carry-out from the 4th low order bit of the result
The result of an arithmetic or logic operation is zero
The result of an arithmetic or logic operation is not zero
After power-up or by a CLRWDT instruction
By execution of the SLEEP instruction
After power-up and by the CLRWDT and SLEEP instruction
A watchdog timer time-out has occurred
00 = Page 0 (000 - 1FF)
01 = Page 1 (200 - 3FF)
10 = Page 2 (400 - 5FF)
11 = Page 3 (600 - 7FF)
Each Bank is 512 words.
Using the PA1:PA0 bits as general purpose read/write bits in devices
since this may affect upward compatibility with future products.
TO, PD are uniquely set or cleared
W:
Writable
R:
Readable
U:
Unimplemented,
read as '0'
Address:
03h
POR value:
0001
1xxx
Register:
STATUS
Note: For borrow the polarity is reversed.
Note: For Borrow the polarity is reversed.
(PIC16C56 and PIC16C57 only).
PA2: This bit is unimplemented at this time.
which do not use them for Program Page Pre-select is not recommended,
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