參數(shù)資料
型號: MUAA2K80-30QGI
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 1/24頁
文件大?。?/td> 395K
代理商: MUAA2K80-30QGI
Data Sheet
MUSIC Semiconductors, the MUSIC logo, and the phrase "MUSIC Semiconductors" are
Registered trademarks of MUSIC Semiconductors. MUSIC is a trademark of
MUSIC Semiconductors.
January 9, 2001 Rev. 3
APPLICATION BENEFITS
High performance MAC Address processor for
multiport switches and routers (Up to 48 10/100 or 4
Gigabit Ethernet at wire speed)
Layer 4 flow recognition for Quality of Service up to
16.7 million packets per second
ARP Cache manager/IP address caching at 12.5
million packets per second
Synchronous interfaces and programmable priority
between ports for simplicity of design
Learn, age, and auto-age functions with “virtual
queues,” keeping track of aged and learned entries
Transparent cascade of up to four 2K devices without
external logic, software setup, or performance hit
DISTINCTIVE CHARACTERISTICS
2K and 8K x 80-bit partitionable CAM/RAM data
field in address database
32-bit synchronous port with separate inputs and
outputs; optional 16-bit configuration
32-bit bi-directional processor port; optional 16-bit
configuration
Pipelined operation
Operations performed from the synchronous port or
processor port; all flags independently available to
both ports
9-bit internal time stamp
50 MHz clock
388-pin PBGA (8K) and 160-pin PQFP (2K)
packages.
3.3 Volt core with 3.3 Volt/5 Volt tolerant IO buffers.
IEEE 1149.1 (JTAG) compliant
Figure 1: Block Diagram
-- b i t 79 -- ------- ------- b i t 0---
80-bit la tch
80-bit la tch
80 to 32/16-bit mux
80 to 32/16-bit mux
80-bit latch
80-bit 2 to 1 mux
16/32 to 80-bit mux
Control
JTAG
S
D
P
O
/
D
/
/
/
TDI
TMS
TCK
TRST
16/32 to 80-bit mux
TDO
PROCD(31:0)
PROCA(5:0)
/PCS
R/W
PROCREADY
INT
/RESET
CLK
S
D
/FF
/MF
CHAIN
CHAINUP
CHAINDN
/CHAINCS
P
Address Data Base
Flag and
Chain
Logic
80-bit latch
MUAA Routing CoProc essor (RCP) Family
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