參數(shù)資料
型號: MV80C51C-12R
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP44
封裝: 1.40 MM HEIGHT, QFP-44
文件頁數(shù): 10/170頁
文件大小: 4133K
代理商: MV80C51C-12R
107
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
15.3.1
Non-Volatile Memory Lock Bits
The ATtiny4/5/9/10 provide two Lock Bits, as shown in Table 15-1.
The Lock Bits can be left unprogrammed ("1") or can be programmed ("0") to obtain the additional security shown
in Table 15-2. Lock Bits can be erased to "1" with the Chip Erase command, only.
Notes:
1. Program the configuration section bits before programming NVLB1 and NVLB2.
2. "1" means unprogrammed, "0" means programmed
15.3.2
Flash Memory
The embedded Flash memory of ATtiny4/5/9/10 has four separate sections, as shown in Table 15-3 and Table 15-
3.
Table 15-1.
Lock Bit Byte
Lock Bit
Bit No
Description
Default Value
7
1 (unprogrammed)
6
1 (unprogrammed)
5
1 (unprogrammed)
4
1 (unprogrammed)
3
1 (unprogrammed)
2
1 (unprogrammed)
NVLB2
1
Non-Volatile Lock Bit
1 (unprogrammed)
NVLB1
0
Non-Volatile Lock Bit
1 (unprogrammed)
Table 15-2.
Lock Bit Protection Modes
Memory Lock Bits (1)
Protection Type
Lock Mode
NVLB2 (2)
NVLB1 (2)
1
No Memory Lock feature Enabled
21
0
Further Programming of the Flash memory is disabled in
the external programming mode. The configuration
section bits are locked in the external programming
mode
30
0
Further programming and verification of the flash is
disabled in the external programming mode. The
configuration section bits are locked in the external
programming mode
Table 15-3.
Number of Words and Pages in the Flash (ATtiny9/10)
Section
Size (Bytes)
Page Size (Words)
Pages
WADDR
PADDR
Code (program memory)
1024
8
64
[3:1]
[9:4]
Configuration
8
1
[3:1]
Signature (1)
16
8
2
[3:1]
[4:4]
Calibration (1)
8
1
[3:1]
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