參數(shù)資料
型號： MV80C51T-16D
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP44
封裝： 1.40 MM HEIGHT, QFP-44
文件頁數(shù)： 3/170頁
文件大?。?/td> 4133K
代理商： MV80C51T-16D
100
ATtiny4/5/9/10 [DATASHEET]
8127F–AVR–02/2013
Read messages. A read message is a request to read data. The TPI reacts to the request by sending the byte
operands. This message type is used with the SLDCS, SLD and SIN instructions.
All the instructions except the SKEY instruction require the instruction to be followed by one byte operand. The
SKEY instruction requires 8 byte operands. For more information, see the TPI instruction set on page 100.
14.4.2
Exception Handling and Synchronisation
Several situations are considered exceptions from normal operation of the TPI. When the TPI physical layer is in
receive mode, these exceptions are:
The TPI physical layer detects a parity error.
The TPI physical layer detects a frame error.
The TPI physical layer recognizes a BREAK character.
When the TPI physical layer is in transmit mode, the possible exceptions are:
The TPI physical layer detects a data collision.
All these exceptions are signalized to the TPI access layer. The access layer responds to an exception by aborting
any on-going operation and enters the error state. The access layer will stay in the error state until a BREAK char-
acter has been received, after which it is taken back to its default state. As a consequence, the external
programmer can always synchronize the protocol by simply transmitting two successive BREAK characters.
14.5
Instruction Set
The TPI has a compact instruction set that is used to access the TPI Control and Status Space (CSS) and the data
space. The instructions allow the external programmer to access the TPI, the NVM Controller and the NVM memo-
ries. All instructions except SKEY require one byte operand following the instruction. The SKEY instruction is
followed by 8 data bytes. All instructions are byte-sized.
The TPI instruction set is summarised in Table 14-1.
Table 14-1.
Instruction Set Summary
Mnemonic
Operand
Description
Operation
SLD
data, PR
Serial LoaD from data space using indirect
addressing
data
DS[PR]
SLD
data, PR+
Serial LoaD from data space using indirect
addressing and post-increment
data
DS[PR]
PR
PR+1
SST
PR, data
Serial STore to data space using indirect
addressing
DS[PR]
data
SST
PR+, data
Serial STore to data space using indirect
addressing and post-increment
DS[PR]
data
PR
PR+1
SSTPR
PR, a
Serial STore to Pointer Register using direct
addressing
PR[a]
data
SIN
data, a
Serial IN from data space
data
I/O[a]
SOUT
a, data
Serial OUT to data space
I/O[a]
data
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