參數(shù)資料
型號(hào): MV8870-1
廠商: Zarlink Semiconductor Inc.
英文描述: INTERGRATED DTMF RECEIVER
中文描述: 集成雙音多頻接收器
文件頁(yè)數(shù): 2/12頁(yè)
文件大?。?/td> 205K
代理商: MV8870-1
MV8870/MV8870-1
1
DS3140-2.1
MV8870 / MV8870-1
INTEGRATED DTMF RECEIVER
DIGITAL
DETECTION
ALGORITHM
CODE
CONVERTER
AND LATCH
HIGH GROUP FILTER
DIAL TONE FILTER
LOW GROUP FILTER
ZERO
CROSSING
DETECTORS
STEERING LOGIC
CHIP
CLOCKS
BIAS CIRCUIT
CHIP
POWER
CHIP
BIAS
1(1)
2(2)
3(3)
IN+
IN-
GS
18(28)
V
DD
V
SS
9(14)
V
REF
4(5)
FLT
(22)
OSC1
7(12)
OSC2
8(13)
FL
(21)
ESt
16(26)
StD
15(25)
St/GT
17(27)
TOE
10(16)
Q4
14(20)
Q3
13(19)
Q2
12(18)
Q1
11(17)
FH
(9)
FHT
(8)
PD
6(10)
SEL
5(7)
Figure 2: Functional block diagram (Pin numbers in brackets refer to HP package)
Figure 1: Pin connections - top view
25
24
23
22
21
20
19
5
6
7
8
9
10
11
V
REF
NC
SEL
FHT
FH
PD
NC
StD
NC
NC
FLT
FL
Q4
Q3
N
G
I
I
V
D
2
S
2
E
2
O
O
V
S
N
T
Q
Q
HP28
1
1
1
1
1
1
1
4
3
2
1
IN+
IN-
GS
V
REF
SEL
PD
OSC1
OSC2
V
SS
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
V
DD
St/GT
ESt
StD
Q4
Q3
Q2
Q1
TOE
DG18
DP18
MP18
The MV8870 / MV8870-1 is a complete DTMF receiver
integrating both the bandsplit filter and digital decoder
functions, fabricated in GPS’s double-poly ISO2-CMOS
technology. The filter section uses switched capacitor
techniques for high and low group filters; the decoder uses
digital counting techniques to detect and decode all 16 DTMF
tone pairs into a 4-bit code.
External component count is minimised by on-chip
provision of a differential input amplifier, clock oscillator and
latched 3-state bus interface.
The MV8870 and MV8870-1 are functionally identical, but
differ in Electrical Characteristics.
FEATURES
I
Complete DTMF Receiver
I
Low Power Consumption
I
Internal Gain Setting Amplifier
I
Adjustable Guard Time
I
Central Office Quality
APPLICATIONS
I
Receiver Systems for BT or CEPT Specifications
I
Paging Sytems
I
Repeater Systems / Mobile Radio
I
Credit Card Systems
I
Remote Control
ADVANCE INFORMATION
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