MVTX2801
Data Sheet
2
Zarlink Semiconductor Inc.
Port-based Priority: VLAN Priority with Tagged frame can be overwritten by the priority of PVID
QoS features can be configured on a per port basis Control
Full Duplex Ethernet IEEE 802.3x Flow Control
Provides Ethernet Multicast and Broadcast Control
2 Port Trunking groups, max of 3 ports per group (Trunking can be based on source MAC and/or destination
MAC and source port)
LED signals provided by a serial or parallel interface
Synchronous Serial Interface and I
2
C interface in unmanaged mode.
Hardware auto-negotiation through serial management interface (MDIO) for Gigabit Ethernet ports, supports
10/100/1000 Mbps
BIST for internal and external SRAM-ZBT
I
2
C EEPROM or synchronous serial port for configuration
Packaged in 596-pin BGA
Description
The MVTX2800 family is a group of 1000 Mbps non-blocking Ethernet switch chips with on-chip address memory. A
single chip provides a maximum of eight 1000 Mbps ports and a dedicated CPU interface with a 16/8-bit bus for
managed and unmanaged switch applications. The MVTX2800 family consists of the following four products:
MVTX2804 8 Gigabit ports Managed
MVTX2803 8 Gigabit ports Unmanaged
MVTX2802 4 Gigabit ports Managed
MVTX2801 4 Gigabit ports Unmanaged
The MVTX2801 supports up to 64K MAC addresses to aggregate traffic from multiple wiring closet stacks. The
centralized shared-memory architecture allows a very high performance packet-forwarding rate of 11.904M packet
per second at full wire speed. The chip is optimized to provide a low-cost, high performance workgroup, and wiring
closet, layer 2 switching solution with 4 Gigabit Ethernet ports.
One Frame Buffer Memory domain utilize cost effective, high-performance ZBT-SRAM with aggregated bandwidth
of 8.5Gbps to support full wire speed on all external ports simultaneously.
With Strict priority, Delay Bounded, and WRR transmission scheduling, plus WRED memory congestion scheme,
the chip provides powerful QoS functions for convergent network multimedia and mission-critical applications. The
chip provides 8 transmission priorities and 2 level drop precedence. Traffic is assigned its transmission priority and
dropping precedence based on the frame VLAN Tag priority.
The MVTX2801 supports port trunking/load sharing on the 1000 Mbps ports with fail-over capability. The port
trunking/load sharing can be used to group ports between interlinked switches to increase the effective network
bandwidth.
In full-duplex mode, IEEE 802.3x flow control is provided. The Physical Coding Sublayer (PCS) is integrated on-
chip to provide a direct 10-bit GMII interface, or the PCS can be bypassed to provide an interface to existing fiber-
based Gigabit Ethernet transceivers.
The MVTX2801 is fabricated using 0.25(
μ
m technology. Inputs, however, are 3.3V tolerant and the outputs are
capable of directly interfacing to LVTTL levels. The MVTX2801 is packaged in a 596-pin Ball Grid Array package.