
MVTX2803
Data Sheet
35
Zarlink Semiconductor Inc.
10.2.2 ECR2Pn: Port N Control Register
I
2
C Address: 01+2n; Serial Interface Address:h001+2n (n=0to7)
Accessed by serial interface (R/W)
7
5
3
2
1
0
Security En
DisL
Ftf
Futf
Bit[0]:
Filter untagged frame
(Default 0)
0: Disable
1: Enable – All untagged frames from this port are discarded or follow security option when security
is enable
Bit[1]:
Filter Tag frame
(Default 0)
0: Disable
1: Enable - All tagged frames from this port are discarded or follow security option when security is
enable
Bit[2]:
Learning Disable
(Default 0)
0: Learning is enabled on this port
1: Learning is disabled on this port
Bit [5:3:]
Reserved
Bit[7:6]
Security Enable (Default 00). The MVTX2804AG checks the incoming data for one of the following
conditions:
If the source MAC address of the incoming packet is in the MAC table and is defined as secure
address but the ingress port is not the same as the port associated with the MAC address in the
MAC table.
A MAC address is defined as secure when its entry at MAC table has static status and bit 0 is set to
1. MAC address bit 0 (the first bit transmitted) indicates whether the address is unicast or multicast.
As source addresses are always unicast bit 0 is not used (always 0). MVTX2804 uses this bit to
define secure MAC addresses.
If the port is set as learning disable and the source MAC address of the incoming packet is not
defined in the MAC address table.
If the port is configured to filter untagged frames and an untagged frame arrives or if the port is
configured to filter tagged frames and a tagged frame arrives.
If one of these three conditions occurs, the packet will be handled according to one of the following
specified options:
00 – Disable port security
01 – Enable port security. Port will be disabled when security violation is detected
10 – N/A
11 – N/A