- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359266 > MX98742 FEBC 100 Base Fast Ethernet Bridge Controller PDF資料下載
參數(shù)資料
| 型號(hào)： | MX98742 |
| 英文描述： | FEBC 100 Base Fast Ethernet Bridge Controller |
| 中文描述： | FEBC 100基地快速以太網(wǎng)橋控制器 |
| 文件頁數(shù)： | 24/36頁 |
| 文件大?。?/td> | 166K |
| 代理商： | MX98742 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當(dāng)前第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
24
MX98745
P/N:PM0427
REV. 1.4, JUL. 8, 1998
M. Configuration Register (register #31) (R/W)
Bit(s)
31.15
31.14
Name
Reserved
L40H80
Description
Reserved for further usage.
1:Internal arbiter will qualify EDENL for more than 80 ns.
0:Internal arbiter will qualify EDENL for more than 40 ns.
Power on low.
Reserved for further usage.
Power on reset value of LDS0.
After power on reset, Write 1 to this bit will not make EEPROM operation.
When EECF is low, then value on corresponding pins (known as hardwire
setting) will be latched by MX98745 and overwrite the default setting of
MX98745.
Force to High all the time.
1 : Set XRC II to monitor mode and monitor serial output of internal state
machine through LED7..0
0 : Put MX98745 in normal mode.
0:Internal Arbitor function is disabled.
1:Internal Arbitor function is enabled
Power on low.
1 : Partition function meets IEEE 802.3u i.e. when two ports collide more
than 128 times, two ports will be partitoned by MX98745 simultaneously.
0 : Those ports which Receive after Transmit will be partitioned.(Same as
MX98741) i.e. ports encounter transmit collision will be paritioned only.
Value on LED0 will be stored in this bit in case EECONF is 0.
1:PCS type MII for port0
0:MAC type MII for port0 value on LED1 will be stored at this bit after
power on reset. When TXXMII is set to 1, this bit has no effect.
Contents will not be overwritten by EEPROM.
1 : TX port is programmed (5B) for port 0
0 : MII mode (4B) is programmed for port 0
After power on reset, value on LED2 will be stored on this bit. Contents
will not be overwritten while loading EEPROM.
Physical address of MX98745.
When EECONF is set to 0 (Disabled), value on LED[7:3] will be stored in
these five bits at the rising edge of RESETL.
If EECONF is set to high, value from EEPROM will overwrite the hardwire
setting.
R/W
R/W
R/W
31.13:12
31.11
Reserved
EECF
R
31.10
31.9
Reserved
MONITOR
R/W
R
31.8
INTARB
R/W
31.7
FLWSPEC
R/W
31.6
PXM
R/W
31.5
TXXMII
R/W
31.4:0
PHY[4:0]
R/W
Table 6-13 Configuration Register Bit Definition
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MX98902A(PLCC) | LAN Node Controller |
| MX98902A(PQFP) | LAN Node Controller |
| MX98902A(SQFP) | LAN Node Controller |
| MX99011MC | Interface IC |
| MXA-256-1 | Optoelectronic |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MX98743 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Communications Controller |
| MX98745 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:100 BASE-TX/FX REPEATER CONTROLLER |
| MX98746 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:100 Base-TX/FX 5-Port Class II Repeater Controller |
| MX98747 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10/100M 8PORT DUAL SPEED HUB CONTROLLER |
| MX98748 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Highly Intergated 10/100M Dual Speed Hub With Extra 4 Port Switch Built-In |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。