參數(shù)資料
型號(hào): NB4L6254FAG
廠商: ON Semiconductor
文件頁(yè)數(shù): 10/11頁(yè)
文件大?。?/td> 0K
描述: IC CLK MUX SWITCH 1:6/1:3 32LQFP
標(biāo)準(zhǔn)包裝: 250
類(lèi)型: 多路復(fù)用器,開(kāi)關(guān)
電路數(shù): 1 或 2
比率 - 輸入:輸出: 1:6,1:3
差分 - 輸入:輸出: 是/是
輸入: LVCMOS,LVPECL
輸出: LVPECL
頻率 - 最大: 3GHz
電源電壓: 2.375 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-LQFP(7x7)
包裝: 托盤(pán)
NB4L6254
http://onsemi.com
8
Example Configurations
Figure 7. 2 x 2 Clock Switch
CLK0
CLK1
SEL0
SEL1
System A
System B
3
SEL0
SEL1
Switch Configuration
0
CLK0 Clocks System A and
System B
0
1
CLK1 Clocks System A and
System B
1
0
CLK0 Clocks System A and CLK1
Clocks System B
1
CLK1 Clocks System B and CLK1
Clocks System A
Figure 8. 1:6 Clock Fanout Buffer
CLK0
CLK1
SEL0
SEL1
0
Figure 9. Loopback Device
SystemTx
CLK0
SEL0
SEL1
QBn
CLK1
Transmitter
QAn
SystemRx
Receiver
SEL0
SEL1
Switch Configuration
0
System Loopback
0
1
Line Loopback
1
0
Transmit/Receive Operation
1
System and Line Loopback
APPLICATIONS INFORMATION
Maintaining Lowest Device Skew
The NB4L6254 guarantees low outputoutput bank skew
at 50 ps and a parttopart skew of 250 ps. To ensure low
skew clock signals in the application, both outputs of any
differential output pair need to be terminated identically,
even if only one output is used. When fewer than all nine
output pairs are used, identical termination of all output pairs
within the output bank is recommended. If an entire output
bank is not used, it is recommended to leave all of these
outputs open and unterminated. This will reduce the device
power consumption while maintaining minimum output
skew.
Power Supply Bypassing
The NB4L6254 is a mixed analog/digital product. The
differential architecture of the NB4L6254 supports low
noise signal operation at high frequencies. In order to
maintain its superior signal quality all VCC pins should be
bypassed by highfrequency ceramic capacitors connected
to GND. If the spectral frequencies of the internally
generated switching noise on the supply pins cross the series
resonant port of an individual bypass capacitor, its overall
impedance begins to look inductive and thus increases with
increasing frequency. The parallel capacitor combination
shown ensures that a low impedance path to ground exists
for frequencies well above the noise bandwidth.
Figure 10. VCC Power Supply Bypass
VCC
NB4L6254
33 100 nF
0.1 nF
VCC
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