參數(shù)資料
型號(hào)： NB7V33MMNTXG
廠商： ON Semiconductor
文件頁數(shù)： 1/10頁
文件大?。?/td> 0K
描述： IC CLOCK DIVIDER 1:1 10GHZ 16QFN
標(biāo)準(zhǔn)包裝： 3,000
系列： GigaComm™
類型： 分配器
電路數(shù)： 1
比率 - 輸入:輸出： 1:1
差分 - 輸入:輸出： 是/是
輸入： CML，LVDS，LVPECL
輸出： CML
頻率 - 最大： 10GHz
電源電壓： 1.71 V ~ 2.625 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 16-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 16-QFN（3x3）
包裝： 帶卷 (TR)
Semiconductor Components Industries, LLC, 2010
January, 2010 Rev. 2
1
Publication Order Number:
NB7V33M/D
NB7V33M
1.8V / 2.5V, 10GHz ÷4 Clock
Divider with CML Outputs
MultiLevel Inputs w/ Internal Termination
Description
The NB7V33M is a differential
B4 Clock divider with
asynchronous reset. The differential Clock inputs incorporate internal
50
W termination resistors and will accept LVPECL, CML and LVDS
logic levels. The NB7V33M produces a
÷4 output copy of an input
Clock operating up to 10 GHz with minimal jitter. The Reset pin is
asserted on the rising edge. Upon powerup, the internal flip
*flops
will attain a random state; the Reset allows for the synchronization of
multiple NB7V33M’s in a system. The 16 mA differential CML
output provides matching internal 50
W termination which guarantees
400 mV output swing when externally receiver terminated with 50
W
to VCC.
The NB7V33M is the
B4 version of the NB7V32M (B2) and is
offered in a low profile 3 mm x 3 mm 16pin QFN package.
The NB7V33M is a member of the GigaComm
family of high
performance clock products. Application notes, models, and support
documentation are available at www.onsemi.com.
Features
Maximum Input Clock Frequency > 10 GHz, typical
260 ps Typical Propagation Delay
35 ps Typical Rise and Fall Times
Differential CML Outputs, 400 mV PeaktoPeak, Typical
Operating Range: VCC = 1.71 V to 2.625 V with GND = 0 V
Internal 50 W Input Termination Resistors
Random Clock Jitter < 0.8 ps RMS
QFN16 Package, 3 mm x 3 mm
40C to +85°C Ambient Operating Temperature
These are PbFree Devices
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= PbFree Package
*For additional marking information, refer to
Application Note AND8002/D.
MARKING
DIAGRAM*
QFN16
MN SUFFIX
CASE 485G
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
ORDERING INFORMATION
16
NB7V
33M
ALYW G
G
1
Q0
Figure 1. Simplified Logic Diagram
VTCLK
CLK
50 W
VTCLK
50 W
(Note: Microdot may be in either location)
1
RESET
R
B4
VREFAC
VCC
GND
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