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參數(shù)資料
| 型號(hào)： | NB7V33MMNTXG |
| 廠(chǎng)商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK DIVIDER 1:1 10GHZ 16QFN |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 系列： | GigaComm™ |
| 類(lèi)型： | 分配器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | CML，LVDS，LVPECL |
| 輸出： | CML |
| 頻率 - 最大： | 10GHz |
| 電源電壓： | 1.71 V ~ 2.625 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 16-QFN（3x3） |
| 包裝： | 帶卷 (TR) |
NB7V33M
http://onsemi.com
5
Symbol
Characteristic
Min
Typ
Max
Unit
fMAX
Maximum Input Clock Frequency
10
11
GHz
VOUTPP Output Voltage Amplitude (@ VINPPmin) fin ≤ 10 GHz
(Note 12) (Figure 3)
260
400
mV
tPLH,
tPHL
Propagation Delay to Differential Outputs,
@ 1 GHz, measured at differential crosspoint
CLK/CLK to Q, Q
R to Q, Q
150
500
200
600
350
700
ps
tPLH TC Propagation Delay Temperature Coefficient
50
Dfs/°C
tskew
Duty Cycle Skew (Note 13)
Device Device skew (tpdmax – tpdmin)
20
50
ps
tRR
Reset Recovery (See Figure 16)
550
135
ps
tPW
Minimum Pulse Width R
500
200
ps
tDC
Output Clock Duty Cycle (Reference Duty Cycle = 50%) fin v 10 GHz
45
50
55
%
fN
Phase Noise, fc = 1 GHz
10 kHz
100 kHz
1 MHz
10 MHz
20 MHz
40 MHz
144
147
152
153
dBc
t fN
Integrated Phase Jitter (Figure x) fc = 1 GHz, 12 kHz 20 MHz Offset
35
fs
tJITTER
0.2
0.8
ps RMS
VINPP
200
1200
mV
tr, tf
Output Rise/Fall Times @ 1 GHz (20% 80%), Q, Q
20
35
60
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Measured using a 1 GHz, VINPPmin, 50% dutycycle clock source. All output loading with external 50 W to VCC. Input edge rates 40 ps
(20% 80%).
12.Output voltage swing is a singleended measurement operating in differential mode.
13.Duty cycle skew is defined only for differential operation when the delays are measured from crosspoint of the inputs to the crosspoint
of the outputs. Duty cycle skew is measured between differential outputs using the deviations of the sum of Tpw and Tpw+ @ 1 GHz. Skew
is measured between outputs under identical transitions and conditions.
14.Additive RMS jitter with 50% duty cycle clock signal.
15.Input voltage swing is a singleended measurement operating in differential mode.
fin, CLOCK INPUT FREQUENCY (GHz)
V
OUTP
P,
OUTPUT
VOL
TAGE
AMPLITUDE
(mV)
500
450
400
350
300
250
200
02
4
6
8
10
Figure 3. Output Voltage Amplitude (VOUTPP) vs. Input Frequency (fin) at Ambient Temperature (Typical)
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| NB7V52MMNG | 功能描述:觸發(fā)器 TSMCD FLIP-FLOP RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| NB7V52MMNHTBG | 功能描述:觸發(fā)器 TSMCD FLIP-FLOP RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| NB7V52MMNTXG | 功能描述:觸發(fā)器 TSMCD FLIP-FLOP RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類(lèi)型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類(lèi)型:CMOS 輸出類(lèi)型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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