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參數(shù)資料
| 型號： | NB7VQ14MMNTXG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER MUX 1:4 16-QFN |
| 標準包裝： | 3,000 |
| 系列： | GigaComm™ |
| 類型： | 扇出緩沖器（分配），多路復(fù)用器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:4 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | CML，LVDS，LVPECL |
| 輸出： | CML |
| 頻率 - 最大： | 8.5GHz |
| 電源電壓： | 1.71 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN（3x3） |
| 包裝： | 帶卷 (TR) |
NB7VQ14M
http://onsemi.com
6
Symbol
Characteristic
Min
Typ
Max
Unit
fMAX
Maximum Input Clock Frequency;
VOUT w 200 mV
7
8.5
GHz
fDATAMAX Maximum Operating Data Rate NRZ, (PRBS23)
10
14
Gbps
VOUTPP
Output Voltage Amplitude, EQEN = 0 or 1 (Note 15)
fin ≤ 7GHz
(See Figure 10)
200
400
mV
tPLH,
tPHL
Propagation Delay
IN to Qx
125
175
225
ps
tSKEW
Duty Cycle Skew (Note 12)
Output – Output Within Device Skew
Device to Device Skew
3
15
50
ps
tDC
Output Clock Duty Cycle (Reference Duty Cycle = 50%)
fin v 7GHz
40
50
60
%
FN
Phase Noise, fin = 1 GHz
10 kHz
100 kHz
1 MHz
10 MHz
20 MHz
40 MHz
134
136
150
151
dBc
t FN
Integrated Phase Jitter fin = 1 GHz, 12 kHz 20 MHz
Offset (RMS)
35
fs
tJITTER
RMS Random Clock Jitter (Note 13)
fin v 7 GHz
PeaktoPeak Data Dependent Jitter (Note 14)
fIN ≤ 14 Gbps EQEN = 0 (v 3” FR4)
fIN ≤ 10 Gbps EQEN = 1 (12” FR4)
0.2
0.8
10
ps rms
ps pkpk
VINPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 15)
100
1200
mV
tr
tf
Output Rise/Fall Times @ 1.0 GHz
Qx, Qx
(20% 80%)
15
30
45
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
11. Measured by forcing VINPP 400mV from a 50% duty cycle clock source. All loading with an external RL = 50 W to VCC. Input edge rates 40 ps
(20% 80%).
12.Skew is measured between outputs under identical transitions and conditions @ 0.5 GHz. Duty cycle skew is measured between differential
outputs using the deviations of the sum of Tpw and Tpw+ @ 0.5 GHz.
13.Additive RMS jitter with 50% duty cycle clock signal.
14.Additive peaktopeak data dependent jitter with input NRZ data at PRBS23.
15.Input and output voltage swings are singleended measurements operating in a differential mode.
600
500
400
300
200
100
0
08
12
7
6
5
34
Figure 3. CLOCK Output Voltage Amplitude (VOUTPP) vs. Input Frequency (fin) at Ambient Temperature (Typical)
fin, CLOCK INPUT FREQUENCY (GHz)
OUTPUT
VOL
TAGE
AMPLITUDE
(mV)
Q AMP (mV)
910
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NB7VQ572M | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:1.8V / 2.5V /3.3V Differential 4:1 Mux w/Input Equalizer to 1:2 CML Clock/Data Fanout / Translator |
| NB7VQ572MMNG | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 2.5/3.3V DIFF MUX RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| NB7VQ572MMNR4G | 功能描述:編碼器、解碼器、復(fù)用器和解復(fù)用器 2.5/3.3V DIFF MUX RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| NB7VQ58M | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:1.8V / 2.5V / 3.3V Differential 2:1 Clock/Data Multiplexer / Translator with CML Outputs |
| NB7VQ58MMNG | 功能描述:時鐘緩沖器 Clock/Data Multiplexer/Trans RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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