參數(shù)資料
型號: NSBC114EDXV6T5
廠商: ON SEMICONDUCTOR
元件分類: 小信號晶體管
英文描述: Dual Bias Resistor Transistors(雙偏置電阻晶體管)
中文描述: 100 mA, 50 V, 2 CHANNEL, NPN, Si, SMALL SIGNAL TRANSISTOR
封裝: LEAD FREE, PLASTIC, CASE 463A-01, 6 PIN
文件頁數(shù): 1/9頁
文件大?。?/td> 81K
代理商: NSBC114EDXV6T5
Semiconductor Components Industries, LLC, 2006
May, 2006 Rev. 6
1
Publication Order Number:
NSBC114EDXV6/D
NSBC114EDXV6T1,
NSBC114EDXV6T5
Preferred Devices
Dual Bias Resistor
Transistors
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a baseemitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the NSBC114EDXV6T1
series, two BRT devices are housed in the SOT563 package which is
ideal for low power surface mount applications where board space is at
a premium.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
LeadFree Solder Plating
These are PbFree Devices
MAXIMUM RATINGS
(T
A
= 25
°
C unless otherwise noted, common for Q
1
and Q
2
)
Rating
Symbol
Value
Unit
Collector-Base Voltage
V
CBO
50
Vdc
Collector-Emitter Voltage
V
CEO
50
Vdc
Collector Current
I
C
100
mAdc
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol
Max
Unit
Total Device Dissipation; T
A
= 25
°
C
Derate above 25
°
C
P
D
357 (Note 1)
2.9 (Note 1)
mW
mW/
°
C
Thermal Resistance, Junction-to-Ambient
R
JA
350 (Note 1)
°
C/W
Characteristic
(Both Junctions Heated)
Symbol
Max
Unit
Total Device Dissipation; T
A
= 25
°
C
Derate above 25
°
C
P
D
500 (Note 1)
4.0 (Note 1)
mW
mW/
°
C
Thermal Resistance, Junction-to-Ambient
R
JA
T
J
, T
stg
250 (Note 1)
°
C/W
Junction and Storage Temperature
Range
55 to +150
°
C
1. FR4 @ Minimum Pad
NSBC114EDXV6T1
Preferred
devices are recommended choices for future use
and best overall value.
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
Q
1
R
1
R
2
R
2
R
1
Q
2
(1)
(2)
(3)
(4)
(5)
(6)
SOT563
CASE 463A
PLASTIC
1
xx = Device Code (Refer to Page 2)
M
= Date Code
= PbFree Package
MARKING
DIAGRAM
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
NSBC1xxxDXV6T1
SOT563* 4000/Tape & Reel
NSBC1xxxDXV6T5
SOT563* 8000/Tape & Reel
xx M
1
NSBC1xxxDXV6T1G SOT563* 4000/Tape & Reel
NSBC1xxxDXV6T5G SOT563* 8000/Tape & Reel
*This package is inherently PbFree.
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
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NSBC114EPDXV6/D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual Bias Resistor Transistor