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參數資料
| 型號： | NT511740D5J-5L |
| 廠商： | NANYA TECHNOLOGY CORP |
| 元件分類： | DRAM |
| 英文描述： | 4M X 4 EDO DRAM, 50 ns, PDSO24 |
| 封裝： | 0.300 INCH, PLASTIC, SOJ-26/24 |
| 文件頁數： | 14/16頁 |
| 文件大?。?/td> | 129K |
| 代理商： | NT511740D5J-5L |
NT511740D5J
16MEG : x4
CMOS with Extended Data Out
REV 1.0 May. 2000
7
NANYA TECHNOLOGY CORP.
NAYNA TECHNOLOGY CORP. reserves the right to change products and specifications without notice.
AC CHARACTERISTICS
(0
°C <= Ta <= 70°C , See note 1,2) ; Test condition : VCC=5.0V ± 10%, VIH/VIL=2.4/0.8V, VOH/VOL=2.0/0.8V
-50
-60
Parameter
Symbol
Min
Max
Min
Max
Unit
Notes
Random read or write cycle time
t RC
84
-
104
-
ns
Read-modify-write cycle time
t RWC
110
135
ns
Access time from RAS
t RAC
50
60
ns
3,4,10
Access time from CAS
t CAC
13
15
ns
3,4,5
Access time from column address
t AA
25
30
ns
3,10
CAS to output in Low-Z
t CLZ
0
ns
3
Output buffer turn-off delay from CAS
t CEZ
0
ns
6,14
OE to output in Low-Z
t OLZ
0
ns
3
Transition time (rise and fall)
t T
1
ns
2
RAS precharge time
t RP
30
40
ns
RAS pulse width
t RAS
50
60
ns
RAS hold time
t RSH
7
10
ns
CAS hold time
t CSH
35
40
ns
CAS pulse width
t CAS
7
10
ns
RAS to CAS delay time
t RCD
11
14
ns
4
RAS to column address delay time
t RAD
9
12
ns
10
CAS to RAS precharge time
t CRP
5
ns
Row address set-up time
t ASR
0
ns
Row address hold time
t RAH
7
10
ns
Column address set-up time
t ASC
0
ns
Column address hold time
t CAH
7
10
ns
Column address to RAS lead time
t RAL
25
30
ns
Read command set-up time
t RCS
0
ns
Read command hold time referenced to CAS
t RCH
0
ns
8
Read command hold time referenced to RAS
t RRH
0
ns
8
Write command hold time
t WCH
7
10
ns
Write command pulse width
t WP
7
10
ns
Write command to RAS lead time
t RWL
7
10
ns
Write command to CAS lead time
t CWL
7
10
ns
Data set-up time
t DS
0
ns
9
Data hold time
t DH
7
10
ns
9
Refresh period (2K, Normal)
t REF
32
ms
Refresh period (L-ver)
t REF
128
ms
Write command set-up time
t WCS
0
ns
7
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