TA
參數(shù)資料
型號： OP07CSZ-REEL7
廠商： Analog Devices Inc
文件頁數(shù)： 11/16頁
文件大?。?/td> 0K
描述： IC OPAMP GP LDRIFT LN 8SOIC
產(chǎn)品變化通告： OP07, OP177 Redesign Change 19/Jul/2011
標(biāo)準(zhǔn)包裝： 1
放大器類型： 通用
電路數(shù)： 1
轉(zhuǎn)換速率： 0.3 V/µs
-3db帶寬： 600kHz
電流 - 輸入偏壓： 1.8nA
電壓 - 輸入偏移： 60µV
電壓 - 電源，單路/雙路(±)： ±3 V ~ 18 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SO
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： OP07CSZ-REEL7DKR
OP07
Data Sheet
Rev. G | Page 4 of 16
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
TA = 25°C
Slew Rate
SR
RL ≥ 2 k3
0.1
0.3
V/μs
Closed-Loop Bandwidth
BW
AVOL = 15
0.4
0.6
MHz
Open-Loop Output Resistance
RO
VO = 0, IO = 0
60
Power Consumption
Pd
VS = ±15 V, No load
75
120
mW
VS = ±3 V, No load
4
6
mW
Offset Adjustment Range
RP = 20 k
±4
mV
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Long-term input offset voltage stability refers to the averaged trend time of VOS vs. the time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 μV. Refer to the Typical Performance Characteristics section. Parameter is
sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
OP07C ELECTRICAL CHARACTERISTICS
VS = ±15 V, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
TA = 25°C
Input Offset Voltage1
VOS
60
150
μV
Long-Term VOS Stability2
VOS/Time
0.4
2.0
μV/Month
Input Offset Current
IOS
0.8
6.0
nA
Input Bias Current
IB
±1.8
±7.0
nA
Input Noise Voltage
en p-p
0.1 Hz to 10 Hz3
0.38
0.65
μV p-p
Input Noise Voltage Density
en
fO = 10 Hz
10.5
20.0
nV/√Hz
fO = 100 Hz3
10.2
13.5
nV/√Hz
fO = 1 kHz
9.8
11.5
nV/√Hz
Input Noise Current
In p-p
15
35
pA p-p
Input Noise Current Density
In
fO = 10 Hz
0.35
0.90
pA/√Hz
fO = 100 Hz3
0.15
0.27
pA/√Hz
fO = 1 kHz
0.13
0.18
pA/√Hz
Input Resistance, Differential Mode4
RIN
8
33
M
Input Resistance, Common Mode
RINCM
120
G
Input Voltage Range
IVR
±13
±14
V
Common-Mode Rejection Ratio
CMRR
VCM = ±13 V
100
120
dB
Power Supply Rejection Ratio
PSRR
VS = ±3 V to ±18 V
7
32
μV/V
Large Signal Voltage Gain
AVO
RL ≥ 2 k, VO = ±10 V
120
400
V/mV
RL ≥ 500 , VO = ±0.5 V, VS = ±3 V4
100
400
V/mV
40°C ≤ TA ≤ +85°C
Input Offset Voltage1
VOS
85
250
μV
Voltage Drift Without External Trim4
TCVOS
0.5
1.8
μV/°C
Voltage Drift with External Trim3
TCVOSN
RP = 20 k
0.4
1.6
μV/°C
Input Offset Current
IOS
1.6
8.0
nA
Input Offset Current Drift
TCIOS
12
50
pA/°C
Input Bias Current
IB
±2.2
±9.0
nA
Input Bias Current Drift
TCIB
18
50
pA/°C
Input Voltage Range
IVR
±13
±13.5
V
Common-Mode Rejection Ratio
CMRR
VCM = ±13 V
97
120
dB
Power Supply Rejection Ratio
PSRR
VS = ±3 V to ±18 V
10
51
μV/V
Large Signal Voltage Gain
AVO
RL ≥ 2 k, VO = ±10 V
100
400
V/mV
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