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參數(shù)資料
| 型號： | OP249 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual, Precision JFET High Speed Operational Amplifier |
| 中文描述： | 雙路，高速精密JFET運算放大器 |
| 文件頁數(shù)： | 5/17頁 |
| 文件大?。?/td> | 702K |
| 代理商： | OP249 |
OP249
–5–
REV. C
DICE CHARACTERISTICS
WAFER TEST LIMITS
OP249GBC
Limits
Parameter
Symbol
Conditions
Units
Offset Voltage
Offset Voltage Temperature Coefficient
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection
Power Supply Rejection Ratio
Large-Signal Voltage Gain
Output Voltage Swing
Short-Circuit Current Limit
Supply Current
Slew Rate
V
OS
TCV
OS
I
B
I
OS
IVR
CMR
PSRR
A
VO
V
O
I
SC
I
SY
SR
0.5
6.0
225
75
±
11
76
100
250
±
12.0
±
20/
±
60
7.0
16.5
mV max
μ
V/
°
C max
pA max
pA max
V min
dB min
μ
V/V max
V/mV min
V min
mA min/max
mA max
V/
μ
s min
–40
°
C
≤
T
J
≤
85
°
C
V
CM
= 0 V
V
CM
= 0 V
(Note 1)
V
CM
=
±
11 V
V
S
=
±
4.5 V to
±
18 V
R
L
= 2 k
R
L
= 2 k
Output Shorted to Ground
No Load; V
O
= 0 V
R
L
= 2 k
, C
L
= 50 pF
NOTES
1
Guaranteed by CMR test.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
(@ V
S
=
6
15 V, T
J
= +25
8
C unless otherwise noted)
OUT (A)
–IN (A)
+IN (A)
V–
+IN (B)
–IN (B)
OUT (B)
V+
DIE SIZE 0.072
3
0.112 inch, 8,064 sq. mils
(1.83
3
2.84 mm, 5.2 sq. mm)
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