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參數(shù)資料
| 型號： | OP484 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Precision Rail-to-Rail Input & Output Operational Amplifiers(精密滿幅度輸入輸出運放) |
| 中文描述： | 精密軌到軌輸入 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 370K |
| 代理商： | OP484 |
REV. 0
–14–
OP184/OP284/OP484
A +5 V Only, 12-Bit DAC Swings Rail-to-Rail
T he OP284 is ideal for use with a CMOS DAC to generate a
digitally-controlled voltage with a wide output range. Figure 51
shows a DAC8043 used in conjunction with the AD589 to gen-
erate a voltage output from 0 V to 1.23 V. T he DAC is actually
operating in “voltage switching” mode where the reference is
connected to the current output, I
OUT
, and the output voltage is
taken from the V
REF
pin. T his topology is inherently noninvert-
ing as opposed to the classic current output mode, which is
inverting and not usable in single supply applications.
V
OUT
= 4D
R4
100k
1%
3
2
1
+5V
1/2
OP284
8
4
R2
32.4k
1%
R3
232
1%
R1
17.8k
AD589
GND CLK SR1
LD
4
7
V
REF
R
FB
V
DD
I
OUT
1.23V
6
5
8
2
1
3
DAC8043
+5V
DIGITAL
CONTROL
Figure 51. A +5 V Only, 12-Bit DAC Swings Rail-to-Rail
In this application the OP284 serves two functions. First, it
buffers the high output impedance of the DAC’s V
REF
pin,
which is on the order of 10 k
. T he op amp provides a low
impedance output to drive any following circuitry. Second, the
op amp amplifies the output signal to provide a rail-to-rail out-
put swing. In this particular case, the gain is set to 4.1 so that
the circuit generates a 5 V output when the DAC output is at
full scale. If other output voltage ranges are needed, such as 0 V
≤
V
OUT
≤
4.095 V, the gain can easily be changed by adjusting
the values of R2 and R3.
A High-Side Current Monitor
In the design of power supply control circuits, a great deal of
design effort is focused on ensuring a pass transistor’s long-term
reliability over a wide range of load current conditions. As a
result, monitoring and limiting device power dissipation is of
prime importance in these designs. T he circuit illustrated in
Figure 52 is an example of a +3 V, single-supply high-side cur-
rent monitor that can be incorporated into the design of a volt-
age regulator with fold-back current limiting or a high current
power supply with crowbar protection. T his design uses an
OP284’s rail-to-rail input voltage range to sense the voltage
drop across a 0.1
current shunt. A p-channel MOSFET used
as the feedback element in the circuit converts the op amp’s dif-
ferential input voltage into a current. T his current is then ap-
plied to R2 to generate a voltage that is a linear representation
of the load current. T he transfer equation for the current
monitor is given by:
Monitor Output
=
R
2
×
R
SENSE
R
1
I
L
For the element values shown, the Monitor Output’s transfer
characteristic is 2.5 V/A.
8
1
4
3
+3V
0.1μF
R
0.1
+3V
I
L
G
S
D
1/2
AD284
2
M1
Si9433
MONITOR
OUTPUT
+3V
R2
2.49k
R1
100
Figure 52. A High-Side Load Current Monitor
Capacitive Load Drive Capability
T he OP284 exhibits excellent capacitive load driving capabili-
ties. It can drive up to 1 nF as shown in Figure 27. However,
even though the device is stable, a capacitive load does not come
without penalty in bandwidth. T he bandwidth is reduced to
under 1 MHz for loads greater than 2 nF. A “snubber” network
on the output doesn’t increase the bandwidth, but it does sig-
nificantly reduce the amount of overshoot for a given capacitive
load. A snubber consists of a series R-C network (R
S
, C
S
), as
shown in Figure 53, connected from the output of the device to
ground. T his network operates in parallel with the load capaci-
tor, C
L
, to provide the necessary phase lag compensation. T he
value of the resistor and capacitor is best determined empirically.
+5V
1/2
OP284
R
S
50
C
100nF
C
L
1nF
V
IN
100mVp-p
0.1μF
V
OUT
Figure 53. Snubber Network Compensates for Capacitive
Load
T he first step is to determine the value of the resistor R
S
. A
good starting value is 100
(typically, the optimum value will
be less than 100
). T his value is reduced until the small-signal
transient response is optimized. Next, C
S
is determined—10
μ
F
is a good starting point. T his value is reduced to the smallest
value for acceptable performance (typically, 1
μ
F). For the case
of a 10 nF load capacitor on the OP284, the optimal snubber
network is a 20
in series with 1
μ
F. T he benefit is immedi-
ately apparent as shown in the scope photo in Figure 54. T he
top trace was taken with a 1 nF load, and the bottom trace was
taken with the 50
, 100 nF snubber network in place. T he
amount of overshoot and ringing is dramatically reduced. T able I
below illustrates a few sample snubber networks for large load
capacitors.
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