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| 型號： | OPTIMIZING |
| 英文描述： | CAN I/O Expander Family, -40C to +125C, 14-SOIC 150mil, T/R |
| 中文描述： | 優(yōu)化輸出Semtech公司雙極針驅(qū)動器（126k配置） |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 126K |
| 代理商： | OPTIMIZING |
3
TEST AND MEASUREMENT PRODUCTS
www.semtech.com
PE-A2
Optimizing the Output Configuration of
Semtech Bipolar Pin Drivers
Revision 1 / December 18, 2002
This sort of impedance mismatch not only effects the
waveform of the signal going to the DUT but also that of
the return signal. These waveform distortions can cause
errors in timing, especially when the comparator voltage
is set near the high or low voltage levels for measuring
rise/fall times or enable/disable times.
Correcting for a resistive mismatch simply requires a
change in the value of the driver backmatch resistor.
Correcting for a capacitive/inductive mismatch requires
adding a complementary component into the signal path.
For a parasitic capacitance, a series inductor needs to be
added. For a parasitic inductance (less common), a
parallel capacitance to ground should be added.
The idea behind adding series inductance or parallel
capacitance is to create a lumped approximation to the
continuous series inductance and parallel capacitance of
a transmission line. For an ideal 50
transmission line,
2.5nh of inductance should be added for each pF of
parasitic capacitance or 0.4pF of capacitance should be
added for each nh of parasitic inductance. In practice,
other imperfections in the transmission line characteristics
will cause slightly more inductance (2.6nh/pF – 3.0nh/
pF) or less capacitance (0.33pF/nh – 0.38pF/nh) to be
required for optimum compensation.
When correcting for multiple parasitics, it is important to
remember that one is attempting to approximate a
continuous series L-parallel C structure. The best
waveforms will be obtained when each parasitic is
connected separately to the signal path and each has its
own compensating component. For instance, if a PPMU
is directly connected to the transmission line for relayless
operation, the Force and Sense lines should be connected
separately, each with its own compensation inductor.
Lumping multiple parasitics to a single point and using a
single compensation component saves components, but
does a poorer job of approximating a transmission line, so
will cause more distortion to the waveforms. This will be
worse for faster slew rates and larger parasitic values.
Since even the best compensation will still be a lumped
approximation of a transmission line, every effort should
be made to minimize the parasitics in order to achieve
the smallest possible waveform distortion.
Matching the DCL to the Transmission Line Impedance
In Semtech DCLs, the driver comparator and load are
pinned out separately in order to get the optimum flexibility
and performance from the process used to create these
parts. When all three functions are used together the
load and comparator pins act as small (~ 3pF) capacitors
which, if uncorrected, will create an impedance mismatch
at high frequencies as described above.
When the Load circuit has a series resistor to match it to
50
, the optimum compensation circuit on Semtech’s
EVM boards has been found to be as shown in Figure 4.
Normally, with two identical (or nearly identical) parasitic
capacitors, two identical value inductors would be used.
However the output impedance of the Semtech bipolar
drivers is slightly inductive rather than capacitive in nature,
so the inductor between the Driver output pin (DOUT) and
Load pin is somewhat smaller than the one between the
Load and Comparator (VINP) pins.
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